2021
DOI: 10.1007/978-3-030-73882-2_147
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Design of a Non-inverting Buck-Boost Converter Controlled by Voltage-Mode PWM in TSMC 180 nm CMOS Technology

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Cited by 3 publications
(2 citation statements)
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“…The proposed buck converter architecture and pseudo-current hysteresis controller are shown in Figure 2 [32], [33], and include driver circuits, a non-overlapping clock generator, a soft start circuit, a current sensor, and a hysteresis voltage controller. The loop response prevents the output from being established instantly during the initial start-up phase of the DC-DC power converter, necessitating loop operation at 100% duty cycle.…”
Section: Methodsmentioning
confidence: 99%
“…The proposed buck converter architecture and pseudo-current hysteresis controller are shown in Figure 2 [32], [33], and include driver circuits, a non-overlapping clock generator, a soft start circuit, a current sensor, and a hysteresis voltage controller. The loop response prevents the output from being established instantly during the initial start-up phase of the DC-DC power converter, necessitating loop operation at 100% duty cycle.…”
Section: Methodsmentioning
confidence: 99%
“…It is made up of two switching devices in the power stage, as well as a current sensing circuit, a hysteresis voltage controller, a non-overlapping clocks generator circuit, and driving circuits [18], [19]. To create the feedback voltage Vfb, the resistors Rfb1 and Rfb2 scale the output voltage, which is denoted by Vo, to the reference voltage, which is denoted by Vref [20]. The feedback voltage is expressed as (1):…”
Section: Methodsmentioning
confidence: 99%