Design of a time-mode analog-to-digital converter utilizing a time-to-digital converter that is scalable with CMOS technology

Abstract

I would also like to thank NTU-A*STAR Silicon Technologies Centre of Excellence under Program 11235100003 and MediaTek Singapore for sponsoring the fabrications of the test chips in 0.18 µm and 40 nm CMOS technologies, respectively. In addition, I would like to thank MediaTek Singapore for taking the time to review my projects.Last but not least, I would like to thank my family and friends for their help, support, and encouragement throughout my Ph.D. journey. They are a source of strength during this difficult journey.