Design of a $V$ -Band 20-dBm Wideband Power Amplifier Using Transformer-Based Radial Power Combining in 90-nm CMOS

Chou, Cheng-Feng; Hsiao, Yuan-Hung; Wu, Yen-Ting; Lin, Yi-Chun; Wu, Chenwei

doi:10.1109/tmtt.2016.2623781

Cited by 54 publications

(15 citation statements)

References 17 publications

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“…The proposed FBGC-based BW expansion technique provides a new and efficient solution for ultra-wideband PAs in FMCW-based ultra-high resolution 2D/3D imaging system or other multi-mode/multiband application scenarios. [5] JSSC' 19 [6] TCAS-I' 14 [7] JSSC' 18 [8] TMTT' 16 [9] TMTT' 15 [10] JSSC' 15 [11] TMTT' 13 [12] This work *FoM = Pout(W) x Gain(abs) x PAE x Freq 2 (GHz) x Frac.BW [5]…”

Section: Discussionmentioning

confidence: 99%

A Gm-Compensated 46-101 GHz Broadband Power Amplifier for High-Resolution FMCW Radars

Wang

Shen

et al. 2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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GHz broadband power amplifier (PA) for high-resolution FMCW radars is presented in this paper. For bandwidth (BW) expanding, a Gm compensator-based negative feedback chain is applied to the PA, compensating the large gain ripple caused by a high-k transformer (TF)-based ultra-wideband interstage matching network (IMN). Based on the proposed Gm-compensated technique, a flat and ultra-wideband power gain of the PA can be obtained with the high-k TF-based IMN. The proposed PA achieves a 55-GHz BW without additional area overhead and efficiency loss. 74.8% of the fractional BW is obtained with <0.3 dB gain ripple in 53-92 GHz. The PA reaches 17.1 dBm Psat and 27% peak PAE respectively, and the core area of the proposed PA in TSMC 40nm CMOS process is 0.1mm 2 .

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Section: Discussionmentioning

confidence: 99%

A Gm-Compensated 46-101 GHz Broadband Power Amplifier for High-Resolution FMCW Radars

Wang

Shen

et al. 2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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“…As shown in Fig. 3(a), in an n-path differential TF-based series voltage combiner, the voltage V1 to Vn across each secondary winding is in even-mode [8]. At the output, the voltage is added up, and the current is sharing in all branches.…”

Section: Power Combiner Considerationmentioning

confidence: 99%

A 77 GHz Power Amplifier Design with in-Phase Power Combing for 20 dBm P_sat in a 40-nm CMOS Technology

Zhang

et al. 2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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Detection distance is a critical specification in automotive driving. The output power of a power amplifier is the bottleneck for the detection range. In this work, a design of 77 GHz power amplifier is presented in a 40 nm CMOS technology with a four-way parallel-series power combing technique for achieving a 20 dBm output power (Psat), which meets a 186-meter detection range in the conditional of 30 mm/h rainfall capacity. In this parallel-series power combing technique, distributed active transformers perform load-pull matching and in-phase power combining. It achieves a compact solution for future on-chip antenna integration. This PA is optimized for maximal power-added efficiency of 21.35% with 20 dBm saturated output power at 77 GHz.

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“…Because of the broadband impedance matching characteristic and moderate chaip area of the transformer, transformers (TF) were used for the E-Band frequency tripler core (TF1) and buffer output (TF2)impedance matching. In E-Band, the majority of the transformer have characteristics that singleturn coil and stacked coupling structure [22]. However, in the design of cascaded cascode topology differential circuits, real part of the next stage input impedance is usually several times or a fraction of the previous stage output impedance.…”

Section: Appendix Dmentioning

confidence: 99%

A 143.2–168.8-GHz signal source with 5.6 dBm peak output power in a 130-nm SiGe BiCMOS process

Zhou

Yan

Peng

et al. 2020

Sci. China Inf. Sci.

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A 143.2-168.8 GHz signal source with 5.6 dBm peak output power at 159 GHz and corresponding-94 dBc/Hz @ 1 MHz phase noise is reported. The circuit includes a 26 GHz Colpitts topology voltagecontrolled-oscillator and a static divide-by-four chains, an E-Band frequency tripler, a balanced D-Band frequency doubler. Through systematically analyzing the influence of input power level (detected by power detector) and base bias voltage on the output power of active frequency doubler, implementation of the D-Band doubler has been carefully designed to maximize output power of the signal source. Besides, by adopting high pass matching network in frequency tripler and frequency doubler design, the signal source exhibits an excellent unwanted harmonics suppression of over 30 dBc in the whole output tuning range. The total chip area is 2.4 mm 2 and the whole DC power consumption is 379 mW, which resulting in a peak DC-to-RF efficiency of 1.14 %. Compared with other D-Band signal sources, this signal source achieves the best phase noise (with divider chain), very competitive tuning bandwidth and the highest output power while using silicon-based processes with the lowest cutoff f T frequency.

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Design of a $V$ -Band 20-dBm Wideband Power Amplifier Using Transformer-Based Radial Power Combining in 90-nm CMOS

Cited by 54 publications

References 17 publications

A Gm-Compensated 46-101 GHz Broadband Power Amplifier for High-Resolution FMCW Radars

A Gm-Compensated 46-101 GHz Broadband Power Amplifier for High-Resolution FMCW Radars

A 77 GHz Power Amplifier Design with in-Phase Power Combing for 20 dBm P_sat in a 40-nm CMOS Technology

A 143.2–168.8-GHz signal source with 5.6 dBm peak output power in a 130-nm SiGe BiCMOS process

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Design of a $V$ -Band 20-dBm Wideband Power Amplifier Using Transformer-Based Radial Power Combining in 90-nm CMOS

Cited by 54 publications

References 17 publications

A Gm-Compensated 46-101 GHz Broadband Power Amplifier for High-Resolution FMCW Radars

A Gm-Compensated 46-101 GHz Broadband Power Amplifier for High-Resolution FMCW Radars

A 77 GHz Power Amplifier Design with in-Phase Power Combing for 20 dBm Psat in a 40-nm CMOS Technology

A 143.2–168.8-GHz signal source with 5.6 dBm peak output power in a 130-nm SiGe BiCMOS process

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Product

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A 77 GHz Power Amplifier Design with in-Phase Power Combing for 20 dBm P_sat in a 40-nm CMOS Technology