Design of an efficient dual mode reconfigurable FIR filter architecture in speech signal processing

Padmapriya, S.; Prabha, V. Lakshmi

doi:10.1016/j.micpro.2015.06.011

Cited by 10 publications

(6 citation statements)

References 13 publications

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“…Secondly, in another very recent study, a novel design for an energyefficient IIR digital filter achieved nearly 63% reduction in energy with a negligible deviation of the frequency response from the standard implementation [1]. Finally, a low power reconfigurable FIR digital filter based on dual mode operation achieved power savings up to 37.97% in simulations using speech signal processing, similar to the simulations in this section [32]. These results demonstrate how low-power digital signal processing continues to be an area of focused interest and innovation.…”

Section: Experimental Design and Results Of The Low-power Adaptive Iir Digital Filtersupporting

confidence: 71%

Asymptotically Optimal Low-Power Digital Filtering Using Adaptive Approximate Processing

Ludwig¹

2020

WCMC

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Techniques for reducing power consumption in digital circuits have become increasingly important because of the growing demand for portable multimedia devices. Digital filters, being ubiquitous in such devices, are a prime candidate for low-power design. We present a new algorithmic approach to low-power frequency-selective digital filtering which is based on the concepts of adaptive approximate processing. This approach is formalized by introducing the class of approximate filtering algorithms in which the order of a digital filter is dynamically varied to provide time-varying stopband attenuation in proportion to the time-varying signal-to-noise ratio (SNR) of the input signal, while maintaining a fixed SNR at the filter output. Since power consumption in digital filter implementations is proportional to the order of the filter, dynamically varying the filter order is a strategy which may be used to conserve power. From this practical technique we abstract a theoretical problem which involves the determination of an optimal filter order based on observations of the input data and a set of concrete assumptions on the statistics of the input signal. Two solutions to this theoretical problem are presented, and the key results are used to interpret the solution to the practical low-power filtering problem. We construct a framework to explore the statistical properties of approximate filtering algorithms and show that under certain assumptions, the performance of approximate filtering algorithms is asymptotically optimal.

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Section: Experimental Design and Results Of The Low-power Adaptive Iir Digital Filtersupporting

confidence: 71%

Asymptotically Optimal Low-Power Digital Filtering Using Adaptive Approximate Processing

Ludwig¹

2020

WCMC

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show abstract

“…In another study, an energy efficient digital filter achieved nearly 70% reduction in energy with a negligible deviation of the frequency response from the standard implementation [12]. As a third example, in simulations using speech signals, a low power reconfigurable FIR digital filter based on dual mode operation achieved power savings up to 37.97% [13]. These results demonstrate how low-power digital signal processing continues to be a stimulating area of focused interest and innovation.…”

Section: Discussionmentioning

confidence: 85%

The Importance of Energy Efficiency in Engineering and Informatics

2021

IJETI

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Techniques for reducing power consumption in digital circuits that underly automatic control of modern engineering systems are of paramount importance due to the simultaneously growing demands for portable multimedia devices and energy conservation. Digital filters, being ubiquitous in such devices, are thus a prime candidate for low power design. We review an algorithmic approach to low power frequency-selective digital filtering, an essential ingredient for energy efficient technological innovation in many domains.

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“…Simulation result examples of gains vs frequency of a low-pass FIR filter with two cutoff frequencies of 100 Hz and 5 kHz are proposed in Figures 8(a) and 8(b). e proposed architecture is also implemented using FPGA of family [10] 0.0077 0.00191 0.0062 0.00191 Reference [27] 0.0089 0.00194 0.0065 0.00194 Reference [28] 0.0091 0.0096 0.0068 0.0097 e design results in Table 6 show the resources occupied by the implementation of the FIR filter with and without the proposed method. e results show that the use of this method does not degrade the other design parameters such as the material resources occupied ( Table 6).…”

Section: Results and Analysismentioning

confidence: 99%

“…In [9], a reduced dynamic signal representation technique is used. In [10], a reversible technique has been used. A memristor-based FIR filter has been proposed in [11].…”

Section: Introductionmentioning

confidence: 99%

Design of Low-Power Structural FIR Filter Using Data-Driven Clock Gating and Multibit Flip-Flops

Touil

Hamdi

Gassoumi

et al. 2020

Journal of Electrical and Computer Engineering

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Optimization for power is one of the most important design objectives in modern digital signal processing (DSP) applications. The digital finite duration impulse response (FIR) filter is considered to be one of the most essential components of DSP, and consequently a number of extensive works had been carried out by researchers on the power optimization of the filters. Data-driven clock gating (DDCG) and multibit flip-flops (MBFFs) are two low-power design methods that are used and often treated separately. The combination of these methods into a single algorithm enables further power saving of the FIR filter. The experimental results show that the proposed FIR filter achieves 25% and 22% power consumption reduction compared to that using the conventional design.

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Design of an efficient dual mode reconfigurable FIR filter architecture in speech signal processing

Cited by 10 publications

References 13 publications

Asymptotically Optimal Low-Power Digital Filtering Using Adaptive Approximate Processing

Asymptotically Optimal Low-Power Digital Filtering Using Adaptive Approximate Processing

The Importance of Energy Efficiency in Engineering and Informatics

Design of Low-Power Structural FIR Filter Using Data-Driven Clock Gating and Multibit Flip-Flops

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