Design of an IPv4/IPv6 Translator Based on SOPC Technology

Liu, Waixi; Tang, Runhua; Li, Hui; Hu, Xiao

doi:10.1109/icnsc.2008.4525322

Cited by 4 publications

(1 citation statement)

References 10 publications

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“…In the early days, general high-speed signal processor is mainly adopted to implement DPC, and this method is gradually eliminated as the new radar system with high-resolution real-time processing technology [5]. However, it becomes more and more mature for using hardware programmable logic, and FPGA (Field Programmable Gate Array) [6,7] can implement DPC meeting precision requirements and increasing speed.…”

Section: Introductionmentioning

confidence: 99%

High Real-Time Design of Digital Pulse Compression Based on FPGA

Zhang

et al. 2015

Mathematical Problems in Engineering

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Because of the poor real-time performance of in-place fast Fourier transforms, a reconfigurable radix-4 FFT processor is studied and designed, which is based on decimation-in-time and single floating-point computation. The proposed method adopts “pipeline and parallel” structure for accessing multiple memories to improve the FFT processing speed, and then it is applied to digital pulse compression. The experimental result shows that the proposed FFT based on radix-4 computation can implement digital pulse compression rapidly under no adding hardware resources. The proposed method can be also applied to other radix FFTs.

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Section: Introductionmentioning

confidence: 99%