Purpose
The purpose of this paper is to design an on-chip inductor with high inductance, high-quality factor and high self-resonance frequency for the equivalent on-chip area using fractal curves.
Design/methodology/approach
A novel hybrid series stacked differential fractal inductor using Hilbert and Sierpinski fractal curves is proposed with two different layers connected in series using vias. The inductor is implemented in Sonnet EM simulator using 180 nm CMOS standard process technology.
Findings
The proposed inductor reduces the parasitic capacitance and negative mutual inductance between the adjacent layers with significant improvement in overall inductance, quality factor and self-resonance frequency when compared with conventional series stacked fractal inductors.
Research limitations/implications
The fractal inductor is used to create high inductance in the single-layer process, but access to multilayers is restricted owing to unusual and expensive fabrication processes.
Practical implications
The proposed inductor can be used in implementation of low noise amplifier, voltage controlled oscillators and power amplifiers.
Originality/value
This paper introduces a combination of two fractal curves to implement a hybrid fractal inductor that enhances the performance of the inductor.