Design of an ultra-low power, low complexity and Low Jitter PLL with digitally controlled oscillator

Anushkannan, N. K.; Mangalam, H.

doi:10.1504/ijaip.2018.10006418

IJAIP

2018

DOI: 10.1504/ijaip.2018.10006418

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Design of an ultra-low power, low complexity and Low Jitter PLL with digitally controlled oscillator

N. K. Anushkannan¹,

H. Mangalam

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Design of an ultra-low power, low complexity and Low Jitter PLL with digitally controlled oscillator

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