Design of electronic control circuit of piezo-electric resonators for ΣΔ modulator loop in AMS Bi-CMOS 0.35µm

Abstract

Most of the recent design methodologies of continuous-time sigma-delta modulators use piezo-electric resonators as loop filters. Compared with classical resonators (Gm-c, Gm-LC and etc), piezo-electric resonators have the advantage of high quality factor and accurate resonance frequency. However, they suffer from anti-resonance frequency and impedance adaptation issues with connected electronic circuits. Therefore, their performance is in practice deteriorated. Compatible electronic control circuit is required to achieve expected performance. In this study, the specifications of the electronic control circuit are studied and this circuit is designed in AMS Bi-CMOS 0.35µm technology. the simulations are done at layout-level.

High‐loop‐delay sixth‐order bandpass continuous‐time sigma–delta modulators

“…The parameters of the equivalent model of the electronic control circuit www.ietdl.org (Fig. 8b) are extracted from post-layout simulation presented in [18] containing the electrical response of the LWR [17]. Through the worst cases simulations, in AMS Bi-CMOS 0.35 μm technology, the maximum error on C c is up to 6%, the cut-off frequency of gain stages (ω p )i sd o w nt o3 f s ,t h e real part of Z I and Z O is up to 40 Ω and finally the error on the DC gain of the gain stages (γ) is up to 20%.…”