Design of fault tolerant digital integrated circuits based on quadded transistor logic

On redundancy-modified NAND multiplexing

“…With the rise of nanoelectronic technology, we are inevitably faced with the question of how to build reliable systems out of unreliable components. To tackle this problem, several fault tolerant techniques based on redundancy have been investigated, such as N-tuple modular redundancy (e.g., triple modular redundancy) [1 -3], reconfiguration [3 -6], quadded logic [7,8] and other redundancy techniques [9 -14]. However, with these techniques alone, high fault tolerance is hard to achieve for nanocomputers since faulty components are pervasive in space and time.…”