Design of Hardware-Friendly Memory Enhanced Neural Networks

Laguna, Ann Franchesca; Niemier, Michael; Hu, Xiaobo Sharon

doi:10.23919/date.2019.8715198

Cited by 26 publications

(24 citation statements)

References 9 publications

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“…We propose simple and dimensionalitypreserving transformations to directly modify real-valued vectors to dense bipolar and dense binary vectors. This is in contrast to prior work 11,13,14 that involves additional quantization, mapping, and coding schemes. In the following, we describe how our systematic transition first transforms the real-valued HD vectors to bipolar.…”

Section: Resultsmentioning

confidence: 88%

“…In the MANN architectures, the key-value memory remains mostly independent of the task and input type, while the controller should be fitted to the task and especially the input type. Convolutional neural networks (CNNs) are excellent controllers for few-shot Omniglot 23 image classification task (see Methods) that has established itself as the core benchmark for the MANNs 6,11,13,14 . We have chosen a 5-layer CNN controller that provides an embedding function to map the input image to an internal feature representation (see Methods).…”

Section: Resultsmentioning

confidence: 99%

“…The experimental results for few-shot problems with varying complexities are presented. For the Omniglot dataset, a few problems have established themselves as standards such as 5-way and 20-way with 1-shot and 5-shots each 11,13,14,[28][29][30][31][32] . There has been no effort for scaling to more complex problems (i.e., more ways/shots) on the Omniglot dataset so far.…”

Section: Resultsmentioning

confidence: 99%

“…We also compare our architecture with other in-memory computing works that use multibit precision in the CAM 11,13,14 . Our binary architecture, despite working with the lowest possible precision, achieves the highest accuracy across all the problems.…”

Section: Resultsmentioning

confidence: 99%

“…Initial simulation results have suggested key memory architectures using NVM devices such as spintronic devices 10 , resistive random access memory (RRAM) 12 , and ferroelectric field-effect transistors (FeFETs) 13 . To map a vector component in the key memory, devices have either been simulated with high multibit precision 10 , or multiple ternary CAM (TCAM) cells by using intermediate mapping functions and encoding to get a binary code 13,14 . Besides these simulation results, a recent prototype has demonstrated the use of a very small scale 2 × 2 TCAM array based on FeFETs 11 .…”

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confidence: 99%

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Robust high-dimensional memory-augmented neural networks

et al. 2021

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Traditional neural networks require enormous amounts of data to build their complex mappings during a slow training procedure that hinders their abilities for relearning and adapting to new data. Memory-augmented neural networks enhance neural networks with an explicit memory to overcome these issues. Access to this explicit memory, however, occurs via soft read and write operations involving every individual memory entry, resulting in a bottleneck when implemented using the conventional von Neumann computer architecture. To overcome this bottleneck, we propose a robust architecture that employs a computational memory unit as the explicit memory performing analog in-memory computation on high-dimensional (HD) vectors, while closely matching 32-bit software-equivalent accuracy. This is achieved by a content-based attention mechanism that represents unrelated items in the computational memory with uncorrelated HD vectors, whose real-valued components can be readily approximated by binary, or bipolar components. Experimental results demonstrate the efficacy of our approach on few-shot image classification tasks on the Omniglot dataset using more than 256,000 phase-change memory devices. Our approach effectively merges the richness of deep neural network representations with HD computing that paves the way for robust vector-symbolic manipulations applicable in reasoning, fusion, and compression.

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Section: Resultsmentioning

confidence: 88%

Section: Resultsmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%

mentioning

confidence: 99%

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Robust high-dimensional memory-augmented neural networks

et al. 2021

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In‐Memory Search for Highly Efficient Image Retrieval

Ling

Zhou

et al. 2023

Advanced Intelligent Systems

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Finding similar images in real time plays a key role in information retrieval and serves as an indispensable function of the search engine. However, image retrieval involves massive distance computation. With the increase in image data volume and dimension, distance computation is suffering from huge power consumption and high computational complexity. Despite the remarkable advantages in energy efficiency shown by nonvolatile content addressable memory (nvCAM)‐based in‐memory search, achieving software‐comparable search accuracy remains a critical challenge under the impact of device variations and other nonideal factors. Here, a heterogeneous image retrieval system combining highly parallel in‐memory search with a high‐precision digital system is reported. Hamming distance (HD) can be calculated in situ with a few memory read operations on the memristor‐based CAM, and several similar images are fetched for further high‐precision rerank in the digital system. This heterogeneous computing system shows high energy efficiency (50×) compared to the CPU and higher search accuracy than the fully in‐memory computing method, thus alleviating the efficiency bottleneck of CPU‐based image retrieval.

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