Design of high speed transimpedance amplifier for optical communication systems

Design of the CMOS inverter‐based amplifier: A quantitative approach

“…In Hsu et al 28 self-forward body bias was proposed to reduce the threshold voltage, thus reducing the required supply voltage. 22 In Salhi et al 42 it was proposed to connect an inductor in series with the resistor in the feedback path of the inverter-based amplifier as shown in Figure 4E to extend the bandwidth. In Kim et al 24 the same inverter cell was utilized in realizing a TIA in laser detection and ranging systems.…”

“…27 On the other hand, boosting the gain by increasing the transconductances of the constituent devices causes the input resistance to decrease, reduces the noise contribution of the two devices, 25 and extends the bandwidth. 19 C, inductive-peaking configuration, 40 D, splitting-load inductive peaking configuration, 22,41 and E, resistive-inductive feedback configuration 42 In Hsu et al 28 self-forward body bias was proposed to reduce the threshold voltage, thus reducing the required supply voltage. In Nguyen et al 29 the resistive-feedback configuration was adopted in realizing a programmable gain amplifier.…”

“…40,41 In Figure 4D, the inductor is adopted in separating the gate terminals of the NMOS and PMOS devices, thus reducing the parasitic capacitance at the input terminal and extending the bandwidth further. 22 In Salhi et al 42 it was proposed to connect an inductor in series with the resistor in the feedback path of the inverter-based amplifier as shown in Figure 4E to extend the bandwidth. The same idea was exploited in Li et al 43 in distributing the capacitances between subsequent stages, thus extending the bandwidth.…”

“…CMOS inverter-based amplifier in the A, open-loop configuration, B, resistive-feedback configuration,19 C, inductive-peaking configuration, 40 D, splitting-load inductive peaking configuration,22,41 and E, resistive-inductive feedback configuration42 …”

A Review of Modern CMOS Transimpedance Amplifiers for OTDR Applications

“…For cost-saving purposes CMOS technology presents an excellent candidate to design a truly low-cost and low-power TIA; however there are significant technical challenges which make the development path more than non-trivial. These technical challenges are mainly related to the contradicting requirements of a typical TIA such as high-gain, large bandwidth and, at the same time, low input noise [8]. Here increasing the gain usually increases chances of instability, while the requirement for lower noise performance often translates into higher power consumption.…”