Design of LDO linear regulator with ultra low-output impedance buffer

Choi, Jungsu; Park, Jungeui; Jeong, Wooju; Lee, Junsang; Lee, Seok; Yoon, Jayang; Kim, Jae-Hoon; Choi, Joongho

doi:10.1109/socdc.2009.5423864

Cited by 13 publications

(6 citation statements)

References 6 publications

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“…The buffer circuit is added of the EA output it is shown in Fig. 1 [3]. By using two pairs of a parallel circuit, low output impedance can be achieved for frequency compensation, subsequently allowing the transient response to enhance low voltage applications, as shown in Fig.…”

Section: Ldo Linear Regulatormentioning

confidence: 99%

LDO of High Power Supply Rejection with Two-Stage Error Amplifiers and Buffer Compensation

Chang

Shiau

et al. 2014

AMR

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This study develops a low dropout regulator linear regulator, characterized by a high power supply rejection ratio using ultra-low output resistance buffer and two-stage error amplifiers. The high power supply rejection is based on a closed-loop LDO regulator. The ultra-low output resistance buffer achieves ultra-low output impedance with dual shunt feedback loops, subsequently improving load and line regulations, as well as the transient response for low voltage applications. The proposed LDO regulator linear regulator functions under an input voltage of 1.8~3V, and the output voltage can be maintained at around 1.27V. Moreover, its output voltage is independent of input voltage. The proposed regulator is applicable to light-emitting diode driver integrated circuits. The layout chip area of the LDO linear regulator is 21.5μm × 42.6μm.

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Section: Ldo Linear Regulatormentioning

confidence: 99%

LDO of High Power Supply Rejection with Two-Stage Error Amplifiers and Buffer Compensation

Chang

Shiau

et al. 2014

AMR

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“…The output resistance of the conventional source follower is 1/g m . To reduce the output resistance of the source follower, the dual shunt feedbacks are designed based on [8], [9]. One loop is M 1 -M 2 -M 3 , and second loop is M 1 -M 4 -M 5 .…”

Section: Wideband Envelope Amplifiermentioning

confidence: 99%

Wideband envelope amplifier for envelope-tracking operation of handset power amplifier

Kim¹,

Kim²,

Cho³

et al. 2014

2014 44th European Microwave Conference

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This paper presents a wideband envelope amplifier for envelope-tracking operation of handset power amplifiers. The amplifier has a combined structure composed of a linear regulator and a switching converter. A low output impedance class-AB push-pull output stage is employed to expand the bandwidth (BW) of the linear regulator. By reducing the output resistance of the source follower using dual shunt feedbacks, a nondominant pole at the gate of the output buffer is pushed to the higher frequency range. The gain BW product (GBW) of the linear regulator is improved without sacrificing the phase margin (PM) and efficiency. The designed linear regulator achieves the GBW of 129.6-MHz and PM of 73.1 • . For a 40-MHz long term evolution signal having a peak-to-average power ratio of 7.4 dB, the envelope amplifier delivers an efficiency of 73.6% at the peak power driving a 7.7Ω resistive load.

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“…The second pole p1 can be obtained from the output resistance of the error amplifier ro,ea and capacitance that results from the input capacitance Ci,buf of the buffer. The third pole p2 is from buffer output resistance ro,buf and parasitic capacitance Cp of the large size pass transistor [2] . General structure of a low-dropout regulator with buffer stage These three poles can be shown as,…”

Section: Stucture Of Ldo Linear Regulatormentioning

confidence: 99%

Design of a dynamic frequency compensation low dropout voltage regulator with buffer impedance attenuation

Peng

She

2012

2012 2nd International Conference on Consumer Electronics, Communications and Networks (CECNet)

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This paper presents a low-drop (LDO) linear regulator with buffer impedance attenuation (BIA) for frequency compensation. This novel proposed LDO take advantage of the dynamically-biased shunt feedback in the buffer stage, which could lower its output resistance for driving the pass device to achieve fast response. Implemented in 0.35 m CMOS process, the LDO dissipates 184 A quiescent current and is able to deliver up to 100mA load current. With a 2.3 F output capacitance, the maximum transient-output variation is 25mV with full-load step change of 100mA.The proposed circuit will find application in the battery-powered portable devices. Kwyword: LDO; BIA; shunt feedback; pass deviceI.

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Design of LDO linear regulator with ultra low-output impedance buffer

Cited by 13 publications

References 6 publications

LDO of High Power Supply Rejection with Two-Stage Error Amplifiers and Buffer Compensation

LDO of High Power Supply Rejection with Two-Stage Error Amplifiers and Buffer Compensation

Wideband envelope amplifier for envelope-tracking operation of handset power amplifier

Design of a dynamic frequency compensation low dropout voltage regulator with buffer impedance attenuation

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