Design of Multiphase Class-G SCPA with Enhanced Efficiency

Ma, Mingming; You, Fei; Xiao, Zehua; Qian, Ting; Tang, Zongxi; He, Shiyuan

doi:10.1109/iscas45731.2020.9180853

Cited by 4 publications

(3 citation statements)

References 7 publications

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“…For u IN = 0 it is desired to be u O = 0, which effectively means that i DSn = i DSp . This in combination with (12) implies that…”

Section: ) Pure Class-a Biasing Conditionsmentioning

confidence: 96%

Class–CTA: Concept and Theoretical Analysis of a High Linearity and Efficiency Power Stage Architecture

Baxevanakis,

Nikitas,

Sotiriadis

2023

IEEE Open J. Circuits Syst.

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This work presents a power stage architecture that combines high-linearity with highefficiency. The power stage is configured as a push-pull Class-A topology with two buck-converters providing its supply rails. The buck-converters continuously track the stage's output with a small constant margin, creating a minimum, constant voltage drop on the output devices; thus, the stage's efficiency is increased and its linearity is improved. Theoretical analysis of the topology and its feedback control are presented, while a design example is implemented and simulated in Cadence Spectre as proof-of-concept.

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“…For u IN = 0 it is desired to be u O = 0, which effectively means that i DSn = i DSp . This in combination with (12) implies that…”

Section: ) Pure Class-a Biasing Conditionsmentioning

confidence: 96%

Class–CTA: Concept and Theoretical Analysis of a High Linearity and Efficiency Power Stage Architecture

Baxevanakis,

Nikitas,

Sotiriadis

2023

IEEE Open J. Circuits Syst.

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“…In addition to the four classic transmitter architectures described above, which are supported by the reconfigurable DSP hardware generator proposed in this work, there are other emerging transmitter architectures of interest, which are briefly described below. The multiphase architecture aims to increase the power efficiency of the PA by reducing the adjacent LO phases that are smaller than π/2 [27], [28]. The hybrid polar I/Q architecture, on the other hand, benefits from the superior RF-DAC drain efficiency of the digital polar architecture and the relaxed tuning range of the phase modulator due to the matched I/Q components of the constrained phase [29].…”

Section: E Emerging Transmitter Architecturesmentioning

confidence: 99%

Reconfigurable Signal Processing and DSP Hardware Generator for 5G and Beyond Transmitters

Ghosh,

Spelman,

Cheung

et al. 2024

IEEE Trans. VLSI Syst.

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The digital front-end of the communication transceivers envisioned for fifth-generation (5G) and beyond requires highly configurable high-performance digital signal processing (DSP) hardware operating at very high sampling rates to accommodate increasing signal bandwidths and support a range of modulation schemes and transmitter architectures. In this article, we present an efficient implementation of a highly configurable DSP hardware generator that can generate high-performance DSP hardware for multiple transmitter architectures including Cartesian, polar, outphasing, and multilevel outphasing modulators. The generated hardware unit, which consists of multistage multirate filters and other required DSP operations, runs at sample rates up to 4 GHz. The hardware supports an adjacent channel leakage ratio (ACLR) down to −48 dB and an error vector magnitude (EVM) of 0.78% with a 7-bit phase signal at a sampling rate of 4 GHz for multilevel outphasing modulation. Digital synthesis of the circuit in a 5-nm complimentary metal-oxide semiconductor (CMOS) process yields a core area consumption of 0.01 mm 2 and an estimated power consumption of 37.2 mW for a 200-MHz bandwidth 5G new radio (NR) baseband (BB) signal.

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“…A VOIDING analog signal processing in transmitters for wireless communications results in benefits such as decreased power consumption and good technology scaling. Therefore, polar [1]- [5] and IQ [6]- [9] digital-intensive wireless transmitter (TX) architectures, as well as novel hybrid approaches such as multiphase [10]- [13], outphasing [14], triphasing [15], or hybrid IQ-polar [16] are becoming a popular choice for today's and future wireless TX architectures. The major challenge of TX architectures is the up-conversion of the baseband (BB) signal to a specific radio-frequency (RF) band, in ideal case without any unwanted spectral components, with high power efficiency supporting wideband single carrier and carrier-aggregated signals.…”

Section: Introductionmentioning

confidence: 99%

A Systematic Solution for the Problem of Spectral Degradation in Multiphase TX Architectures

Hamidović

Preyler

Preissl

et al. 2022

IEEE Trans. Circuits Syst. II

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With ever more stringent requirements of cellular standards it is an ongoing challenge to find the optimal RF transmitter architecture. In recent years, the multiphase transmitter (MP TX) architecture has been introduced as a promising candidate. It features high power efficiency and avoids phase modulation which is critical for upconversion of ultra-wideband signals. In this paper, the problem of unwanted spectral emission, inherent in MP TX architectures, is compensated by a proper data delay. Such an approach is considered for the first time in the multiphase architecture and achieves a spectral improvement of up to 38 dB in adjacent channels and 24 dB at the receiver (RX) duplex distance for a new radio (NR) signal with 20 MHz bandwidth. With the proposed solution the MP TX architecture becomes a highly competitive candidate for wideband signals such as LTE, LTE-CA or NR signals. In addition, a detailed and efficient implementation of the digital front-end (DFE) for the MP TX architecture including the proposed data delay is presented.

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Design of Multiphase Class-G SCPA with Enhanced Efficiency

Cited by 4 publications

References 7 publications

Class–CTA: Concept and Theoretical Analysis of a High Linearity and Efficiency Power Stage Architecture

Class–CTA: Concept and Theoretical Analysis of a High Linearity and Efficiency Power Stage Architecture

Reconfigurable Signal Processing and DSP Hardware Generator for 5G and Beyond Transmitters

A Systematic Solution for the Problem of Spectral Degradation in Multiphase TX Architectures

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