Design of new practical phase shaping circuit using optimal pole–zero interlacing algorithm for fractional order PID controller

Aware, Mohan V.; Junghare, Anjali S.; Khubalkar, Swapnil; Dhabale, Ashwin; Das, Shantanu; Dive, Rutuja

doi:10.1007/s10470-016-0920-0

Cited by 24 publications

(21 citation statements)

References 33 publications

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“…The block diagram of the controlled DC motor emulator is shown in Figure 2. As mentioned before, the analog implementation of the fractional order PI λ D µ controller is done by two methods: (1) Type A controller, which employs the optimal pole-zero interlacing algorithm [26] for the design of both fractional integrator and differentiator circuits; and (2) Type B controller-here, the fractional integrator block in Type A controller is replaced by a solid-state fractional capacitor [37] circuit. In the case of Type A controller, for I λ implementation, there are separate circuits for K i and s −λ .…”

Section: Type a And Type B Pi λ D µ Controllersmentioning

confidence: 99%

“…The description of Type A controller is provided in Section 2.3, which is followed by Type B controller in Section 2.4. The optimal pole-zero interlacing algorithm [26] tries to find the rational approximation of the fractional operator in s-domain. It is one of the techniques available in the literature that can be used for the realization of the fractional integral operator.…”

Section: Type a And Type B Pi λ D µ Controllersmentioning

confidence: 99%

“…Some of the works of PI λ D µ controllers are reported in [3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18]. Similarly, the works on a DC motor can be seen in [19][20][21][22][23][24][25][26][27][28][29]. Recent works of analog PI λ D µ controller on a DC motor includes implementation by Operational Transconductance Amplifiers (OTA) [30] or using CMOS op-amp [31].…”

Section: Introductionmentioning

confidence: 99%

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Hardware Implementation and Performance Study of Analog PIλDμ Controllers on DC Motor

2020

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In this paper, the performance of an analog PI λ D μ controller is done for speed regulation of a DC motor. The circuits for the fractional integrator and differentiator of PI λ D μ controller are designed by optimal pole-zero interlacing algorithm. The performance of the controller is compared with another PI λ D μ controller—in which the fractional integrator circuit employs a solid-state fractional capacitor. It can be verified from the results that using PI λ D μ controllers, the speed response of the DC motor has improved with reduction in settling time ( T s ), steady state error (SS error) and % overshoot (% M p ).

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Section: Type a And Type B Pi λ D µ Controllersmentioning

confidence: 99%

Section: Type a And Type B Pi λ D µ Controllersmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Hardware Implementation and Performance Study of Analog PIλDμ Controllers on DC Motor

2020

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“…To verify the analog FO-PID controller, emulator of DC motor (Plant) is developed. More details are available in Aware et al 26 Plant consists of DC motor and load with specification as speed…”

Section: Lab 3 Analog Fo-pid Controller For DC Motor Emulatormentioning

confidence: 99%

“…[3][4][5][6] Some methods are available that can be used to compute the integer-order approximation of fractional operator. 3,[24][25][26][27][28] The approach to realize analog fractional systems is available in the literature. [25][26][27] Adhikary et al 29 reviewed some significant research work, along with their success and limitations, in the field of fractional circuit realization.…”

Section: Introductionmentioning

confidence: 99%

Unique fractional calculus engineering laboratory for learning and research

Khubalkar

Junghare

Aware

et al. 2018

International Journal of Electrical Engineering & Education

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In this paper, a novel prototype laboratory is presented for engineering education, in which experiments are based on the fractional calculus. The prototypes of analog and digital fractional-order proportional-integral-derivative (PID) controllers are built in the laboratory. These fractional-order PID controllers are applied to linear and nonlinear plants to demonstrate the effectiveness of fractional-order calculus in real time. These experiments are designed, developed, and implemented on the analog and digital platforms. These controllers are integrated to control the DC motor, brushless DC motor, and magnetic levitation modules through hardware-in-loop as well as stand-alone systems. The analog type of fractional-order PID implementation is carried out by using passive components (i.e. resistances and capacitances) with an operational amplifier. However, real-time digital implementation is carried out using field-programmable gate array and digital signal processor. This paper describes how the experiments on fractional calculus can be tailored for graduate, undergraduate students’ education and extended for research in this emerging area.

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Improved constant phase fractional order approximation method for induction motor FOPI speed controller

Adigintla

Aware

2022

Circuit Theory & Apps

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This paper presents the digital realization of the fractional-order PI (FOPI) controller fractional integrator element using the improved constant phase approximation method. A new pole-zero rationalization approach is proposed within the bandwidth of the Bode phase plot. The voltage source inverter fed induction motor fractional-order model has been identified. A novel mathematical FOPI controller design procedure for the identified FO plant model has been proposed. The designed FOPI controller fractional integrator element is implemented using the constant phase approximation method. A detailed comparative performance study of the proposed approximation method with the existing Charef, Oustaloup, and refined Oustaloup methods has been carried out using the Bode, Nyquist, and Nichols plots. The proposed FOPI controller is placed in the speed feedback loop of the rotor field-oriented control algorithm of IM. To confirm the proposed FOPI controller approximation method's robustness, a hardware study is carried out on the laboratory hardware-in-loop (HIL) platform. In addition, variation in the number of pole-zero pair's effect on the speed tracking performance, robustness against parameter and load variations are also analyzed.

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Design of new practical phase shaping circuit using optimal pole–zero interlacing algorithm for fractional order PID controller

Cited by 24 publications

References 33 publications

Hardware Implementation and Performance Study of Analog PIλDμ Controllers on DC Motor

Hardware Implementation and Performance Study of Analog PIλDμ Controllers on DC Motor

Unique fractional calculus engineering laboratory for learning and research

Improved constant phase fractional order approximation method for induction motor FOPI speed controller

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