Design of power-efficient approximate multipliers for approximate artificial neural networks

Mrázek, Vojtěch; Sarwar, Syed Shakib; Sekanina, Lukáš; Vašíček, Zdeněk; Roy, Kaushik

doi:10.1145/2966986.2967021

Cited by 130 publications

(97 citation statements)

References 14 publications

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“…The chip area is estimated as the sum of the sizes of the gates of the circuit, which are given as one of the inputs of ADAC. The chip area is typically a good estimate of the power consumption [3,14,20,22]. The output of ADAC (in the gate-level Verilog format) can be passed to industrial circuit design tools to obtain accurate circuit parameters for the target technology.…”

Section: Architecture and Implementationmentioning

confidence: 99%

“…Besides the approaches mentioned above, there also exist general-purpose methods, such as SALSA [14] or SASIMI [15], approximating circuits independently of their structure. We were unable to perform a direct comparison with them due to their implementation is not available, but based on the published results, ADAC is able to provide a significantly better scalability.…”

Section: Evaluation Related Work and Applicationsmentioning

confidence: 99%

“…Approximate multipliers for convolutional neural networks [14]. In such networks, millions of multiplications have to be performed.…”

Section: Evaluation Related Work and Applicationsmentioning

confidence: 99%

“…Previous works [3,14,20,22] confirmed that the chip area is a good optimization objective as it highly correlates with power consumption, which is a crucial target in approximate computing.…”

Section: Introductionmentioning

confidence: 99%

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ADAC: Automated Design of Approximate Circuits

Češka

Matyas

Mrázek

et al. 2018

Computer Aided Verification

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Abstract. Approximate circuits with relaxed requirements on functional correctness play an important role in the development of resourceefficient computer systems. Designing approximate circuits is a very complex and time-demanding process trying to find optimal trade-offs between the approximation error and resource savings. In this paper, we present ADAC-a novel framework for automated design of approximate arithmetic circuits. ADAC integrates in a unique way efficient simulation and formal methods for approximate equivalence checking into a search-based circuit optimisation. To make ADAC easily accessible, it is implemented as a module of the ABC tool: a state-of-the-art system for circuit synthesis and verification. Within several hours, ADAC is able to construct high-quality Pareto sets of complex circuits (including even 32-bit multipliers), providing useful trade-offs between the resource consumption and the error that is formally guaranteed. This demonstrates outstanding performance and scalability compared with other existing approaches.

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Section: Architecture and Implementationmentioning

confidence: 99%

Section: Evaluation Related Work and Applicationsmentioning

confidence: 99%

“…Approximate multipliers for convolutional neural networks [14]. In such networks, millions of multiplications have to be performed.…”

Section: Evaluation Related Work and Applicationsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

ADAC: Automated Design of Approximate Circuits

Češka

Matyas

Mrázek

et al. 2018

Computer Aided Verification

Self Cite

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show abstract

“…In DNNs, approximations were introduced at levels of the data type quanti- zation, microarchitecture (e.g. neurons insignificantly contributing to the quality of outputs can be removed), training algorithm (an iterative process which can be stopped when good enough results are obtained), the multiply-accumulatetransform circuits (where the design of approximate multipliers and adders for DNN applications represents an independent topic [15], [16]), and memory cells and architecture (where, e.g., less significant bits can be stored in energy efficient, but less reliable memory cells [17]). An ultralow power deep learning ASIC for IoT was implemented on a single chip, capable of performing 374 GOPS/W and consuming less than 300 µW.…”

Section: Approximate Circuits For Image and Video Processingmentioning

confidence: 99%