Design of Rate-Compatible Protograph LDPC Codes for Spin-Torque Transfer Magnetic Random Access Memory (STT-MRAM)

Abstract

Thanks to its superior features of non-volatility, fast read/write speed, high endurance, and low power consumption, spin-torque transfer magnetic random access memory (STT-MRAM) has become a promising candidate for the next generation non-volatile memories (NVMs) and storage class memories (SCMs). However, it has been found that the write errors and read errors caused by thermal fluctuation and process variation severely degrade the reliability of STT-MRAM. Moreover, process imperfection also causes a diversity of the raw bit error rate (BER) among different dies of STT-MRAM. In this paper, we propose the design of novel rate-compatible protograph low-density parity-check (RCP-LDPC) codes to correct memory cell errors and mitigate the raw BER diversity of STT-MRAM. In particular, to deal with the asymmetric property of the STT-MRAM channel, we first apply an independent and identically distributed (i.i.d.) channel adapter to symmetrize the STT-MRAM channel. We then present a modified protograph extrinsic information transfer (P-EXIT) algorithm for the symmetrized STT-MRAM channel. We further propose a combined guideline, including the modified P-EXIT algorithm, the asymptotic weight enumerator (AWE) analysis, as well as the actual error rate performance, for designing protograph LDPC codes with short information word lengths for STT-MRAM. By further applying a code extension approach, we design novel RCP-LDPC codes that can work with a single encoder/decoder. Simulation results show that our proposed RCP-LDPC codes outperform the well-known rate-compatible AR4JA protograph codes as well as the fixed-rate quasi-cyclic (QC) LDPC codes in terms of both the error rate performance and the convergence speed over the STT-MRAM channel. INDEX TERMSSpin-torque transfer magnetic random access memory (STT-MRAM), protograph low-density parity-check (LDPC) codes, rate-compatible codes, protograph extrinsic information transfer (P-EXIT) algorithm, asymptotic weight enumerator (AWE) analysis.

Sparse Code With Minimum Hamming Distance of Three for Spin-Torque Transfer Magnetic Random Access Memory

“…where   If c is not a sparse codeword, 𝒄 is the sparse codeword. We created 𝒄 by equation (17) with signal 𝒂 :…”

“…In [14], BCH codes with multiple error-correction capabilities were introduced to improve storage density. Like in the other fields [15] [16], low-density parity-check (LDPC) codes were used in STT-MRAM to closely approach the Shannon capacity [17]. In [18] [19], adaptive error-correcting schemes were proposed to reduce ECC redundancy.…”