Design of Reconfigurable Low Noise Amplifier Based on Active Inductor

Luo, Yang; Xia, Tongsheng

doi:10.1109/icaica50127.2020.9182454

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Cited by 4 publications

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“…The center part shows the core cascode RF NMOS transistors. As shown in Table 2 below, the performance of this LNA compares well to performance to previous works [13][14][15][16][17][18][19]]. Aneja's report utilized the dual band load technique which showed great performance in terms of S 21 , however its power consumption was excessively high compared to most applications.…”

Section: Frequency (Ghz)supporting

confidence: 67%

Novel Approach and Methods for Optimizing Highly Sensitive Low Noise Amplifier CMOS IC Design for Congested RF Environments

Chung

Iliadis

2022

Electronics

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This work details the optimization and evaluation of a CMOS low-noise amplifier by developing a new algorithm for the gm/ID approach and combining with a modified figure of merit index method. The amplifier includes on-chip matching elements (such as IC inductors) for resonance at the targeted frequencies. The simulation results of the optimized LNA model showed scattering parameter S21 = 19.91 dB, noise figure NF = 3.54 dB and excellent linearity for third-order intermodulation parameter IIP3 = 5.89 dBm for the targeted frequency of f0 = 2.4 GHz.

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