Design of RTD-Based NMIN/NMAX Gates

Abstract

Abstract-A novel implementation of NMIN/NMAX gates based on RTDs and transistors is presented. In this paper we will derive the relations that circuit representative parameters must verify to obtain a correct behaviour by means of the principles of the Monostable-to-Multistable Logic (MML). HSPICE simulations will be used to check our theoretical results.Index Terms-Resonant tunneling diodes, Multivalued logic circuits, Nanotechnology. I. INTRODUCTIONResonant tunneling diodes (RTDs) are very fast non linear circuit elements which have been integrated with transistors to create novel quantum devices and circuits. They are today considered the most mature type of quantum-effect devices, already operating at room temperature, and being promising candidates for future nanoscale integration. ). When connected in series, RTDs provide multiple-peak structures in their I-V characteristics, which make it attractive for multiple-valued logic (MVL) [5]. MVL circuit applications are based on the Monostable-to-Multistable transition Logic (MML) [6], an extension of the binary MOBILE. Logic operation is based on the sequential switching (in increasing order of peak current values) of the RTDs connected in series, which is produced when the bias voltage rises to an appropriate value. Logic functionality is achieved by embedding an input stage (compound-semiconductor transistors, HEMT or HBT) which modifies, according the applied input signal, the peak current of some of the RTDs.The MIN and the MAX functions are applied in the multivalued logic signal processing and they are also useful for analog signal processing [7]. In this paper, we present the architecture of a two-input negated MIN (NMIN) and negated MAX (NMAX) gates by using RTDs and HFET transistors.These gates operate properly in a certain frequency range; that is, they exhibit both a minimum operating frequency and a maximum one. The frequency range depends on the gate fan-out. From the design point of view it should be desirable to have gates without the minimum limit (correct operation from DC up to a maximum frequency). A correct DC operation of this kind of structures requires a proper choice of the size of the RTDs and the transistors. This paper analytically studies this problem and obtains relations between RTD and transistor parameters that ensure a correct operation of the circuit. In order to simplify the analysis we have resorted to piecewise linear descriptions for the RTD driving point characteristics (in red in Fig. 1a). Fig. 1b shows the structure of the NMIN/NMAX circuit based on MML composed by two NDR devices, the driver and the load. The load consists of the series connection of two RTDs whereas the driver is composed by two series connected RTDs and two HFET transistors. The high value of the bias voltage, V bias = V bias H , is selected in order to have two RTDs switched when it is applied. In our analysis, we have considered three specific, feasible voltage values of V in , the high ( H in V ), medium ( M i n V ) and low ( L i n V ) voltages, a...