Design of the modified energy recovery logic circuit

Jianying, Shi; Guo, Bin; Zhao, Rui

doi:10.1109/iceice.2011.5777701

Cited by 2 publications

(2 citation statements)

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“…Several adiabatic or energy recovery logic circuits have been proposed, such as 2N-2N 2D, 2N2N-2P, ECRL, PT-BCRL, BERL ,MERL and so on [2,3,4,5,6,7]. Compared with the traditional CMOS circuits, the power consumption of the above circuits are reduced in different degree, but each has some shortcomings.…”

Section: Introductionmentioning

confidence: 99%

“…The ECRL circuit [4] can't be completely recovered the energy in the recovery phase, and the power consumption becomes bigger in the case of high load capacitance. On the basis of ECRL circuit, the PT-BCRL circuit [5], the BERL circuit [6] and the MERL circuit [7] are proposed early or late. Although they can solve the problems of the ECRL circuit, the power consumptions are restricted by the number of used transistors.…”

Section: Introductionmentioning

confidence: 99%

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Design of the Approved Low Power Energy Recovery Logic Circuit

Shi¹,

Yang

2013

AMR

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An approved energy recovery logic circuit (AERL) was designed in this paper. In order to further reduce the power consumption of energy recovery logic circuits, the NMOS transmission gate and NMOS bootstrap technique ware used. The characteristics of the AERL circuit ware simulated using 0.5 micrometer BSIM3V3 spice models in HSPICE. The results show that the AERL circuit has much lower power consumption compared with PT-BCRL, BERL, ECRL and 2N2N-2P logic.

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