Design of Totally Self-Checking Code-Disjoint Synchronous Sequential Circuits

Greblicki, Jerzy; Piestrak, Stanisław J.

doi:10.1007/3-540-48254-7_18

Cited by 3 publications

(5 citation statements)

References 11 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…A detailed survey of various STCs for m/n and Berger codes can be found in [10], [6], and [11]. There are several implementations of STCs for m/n codes which require only n tests.…”

Section: Definition 2 a Circuit H Is Called A Self-testing Checker (Smentioning

confidence: 99%

“…Since all interfaces are encoded using unordered codes, the functions Zj of an input and output circuit of a TSC SM can be initially expressed in the positive unate form as [6] Zj = L mi, j = {1,2, ...,0},…”

Section: : Time-efficient Design Of Tsc Input/output Circuits Of Smsmentioning

confidence: 99%

“…The circuit that realizes the above functions can be proved TSC using the theory presented in [13] and [6]. Actually …”

Section: : Time-efficient Design Of Tsc Input/output Circuits Of Smsmentioning

confidence: 99%

“…Several design methods of TSC SMs have been proposed in the literature [1]- [8] (for a more extensive bibliography and detailed survey, see [6] and [7].) Here we are interested in designing TSC SMs described by a state transition table with all interfaces (inputs, internal states, and outputs) encoded using EDCs and the input and output combinational circuits (CCs) implemented as TSC.…”

mentioning

confidence: 99%

“…Block scheme of the STC for separable output code for opus 6: Procedure for Designing TSC SMs With 100% Fault Coverage…”

mentioning

confidence: 99%

See 4 more Smart Citations

Feasibility study of designing TSC sequential circuits with 100% fault coverage

Piestrak

17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2002. DFT 2002. Proceedings.

View full text Add to dashboard Cite

Several design methods of self-checking synchronous sequential circuits (SMs) have been proposed in the literature. Two principal drawbacks of all these methods are: 1) the internal fault coverage rarely equals to 100% and 2) the checkers used to monitor correct operation of a SM ( claimed to be self-testing) contain internal faults which cannot be detected during normal operation by a subset of codewords which are actually used. In this paper, we analyze the possibility of designing totally self-checking (TSC) SMs protected against errors using unordered codes with 100% fault coverage.

show abstract

“…A detailed survey of various STCs for m/n and Berger codes can be found in [10], [6], and [11]. There are several implementations of STCs for m/n codes which require only n tests.…”

Section: Definition 2 a Circuit H Is Called A Self-testing Checker (Smentioning

confidence: 99%

Section: : Time-efficient Design Of Tsc Input/output Circuits Of Smsmentioning

confidence: 99%

“…The circuit that realizes the above functions can be proved TSC using the theory presented in [13] and [6]. Actually …”

Section: : Time-efficient Design Of Tsc Input/output Circuits Of Smsmentioning

confidence: 99%

mentioning

confidence: 99%

“…Block scheme of the STC for separable output code for opus 6: Procedure for Designing TSC SMs With 100% Fault Coverage…”

mentioning

confidence: 99%