Design Oriented Analysis of DC Link Current Observer of a Three-phase Double Conversion Uninterruptable Power System or Adjustable Speed Drive

Abstract

In this paper, a high performance dc link current observer is described and analyzed for a double conversion uninterruptible power system (UPS) or an adjustable speed drive (ASD). This second order observer identifies the dc link current drawn by the output inverter section. The observed load current is then used as a feedforward signal to input converter current regulator section for improving its dynamic response. The new contributions include the analysis on the system observability, observer sensitivity to system parameters, its command tracking performance, dc link voltage and load current dynamic disturbance rejection capabilities, all of which are not found in present literatures. In conjunction with the dc link current observer analysis, the current regulator bandwidth performance of the input ac-dc converter stage is characterized for both single and double update pulse width modulation (PWM) methods. The high performance resides in its fast dynamic response to the load power requirements resulting in dc link voltage variation, without using dc link current sensor or any communication channels. The solution is not only ideal for a stand alone UPS or ASD for low cost and high dynamic performance, but is particularly attractive for ac-dc converters suitable for common dc link systems. The analytical results are verified through the state-of-the-art simulation. All control algorithms are implemented in a Texas Instruments (TI) digital signal processor (DSP) and Xilinx field programmable gate array (FPGA) environment. The experimental setup of a 3-phase, 480V, 60Hz, 15 hp (11.19 kW) active front end (AFE) rectifier system is used for analytical and simulation verifications.

Three phase VSI with reduced output voltage distortion using FPGA based multisampled space vector modulation

“…The state variables xi q , xi d , xv q , xv d , represent the integrators of the PI controllers in the system as defined in (11) and (12). While (15) was derived for a generic qd reference frame, the synchronous reference frame was used for the control system as shown in Fig.…”

“…In particular an FPGA based PWM modulator can take multiple samples of the reference voltage and recompute the power converter switching states and timers several times over one switching period [4], [9][10][11]. This is a clear advantage over typical DSP based controllers where the reference is typically sampled no more than twice in one switching period, with a technique often referred to as "double update" [12].…”