2015
DOI: 10.1007/s11227-015-1449-1
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Design space exploration of hardware task superscalar architecture

Abstract: For current high performance computing systems, exploiting concurrency is a serious and important challenge. Recently, several dynamic software task management mechanisms have been proposed. In particular, task-based dataflow programming models which benefit from dataflow principles to improve task-level parallelism and overcome the limitations of static task management systems. However, these programming models rely on software-based dependency analysis, which are performed inherently slowly; and this limits … Show more

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Cited by 3 publications
(2 citation statements)
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“…Before executing a task, it should be analysed using a dependence graph to make sure the correct execution [13,14]. Next, the scheduler determines a target, such as CPU cores, GPUs and FPGAs, for executing the task.…”
Section: -3 Ompss Programming Modelmentioning
confidence: 99%
See 1 more Smart Citation
“…Before executing a task, it should be analysed using a dependence graph to make sure the correct execution [13,14]. Next, the scheduler determines a target, such as CPU cores, GPUs and FPGAs, for executing the task.…”
Section: -3 Ompss Programming Modelmentioning
confidence: 99%
“…Effective parallel implementation of highcomputation applications with big-data workloads for utilizing the parallel capabilities of both CPUs and GPUs is highly challenging. Using OmpSs programming model, programmers focus on defining application parallelism at different levels [13,14], and concentrate on optimizations considering parallel execution in heterogeneous processors such as CPU-GPU architectures. The run-time system is responsible for parallelism extraction and scheduling.…”
Section: Introductionmentioning
confidence: 99%