A low-power and high-resolution capacitance-to-period converter (CPC) based on period modulation (PM) for subnanometer displacement measurement systems is proposed. The presented circuit employs the interface developed in a previous work, "a grounded capacitance-to-voltage converter (CVC) based on a zoom-in structure," further improving its performance through a symmetrical design of the applied autocalibration technique. The scheme is based on the use of a relaxation oscillator. To minimize the error contributed by the CPC circuitry, different precision techniques such as chopping, autocalibration, and active shielding are applied. The proposed CPC is realized in a 0.18-μm complementary metal-oxide-semiconductor (CMOS) technology, occupies an area of 0.5 mm 2 , and consumes 135 μA from a 2-V power supply. In order to achieve optimal performance and avoid overdesigning, a noise estimation of various parts of the CPC has been done. Accordingly, for a 10-pF sensor capacitance, the overall CPC demonstrates a capacitance resolution of 0.5 fF for a latency of 128 microseconds, corresponding to an effective number of bits (ENOB) of 12.5 bits and an energy efficiency of 6 pJ/step. The nonlinearity error has been evaluated as well, resulting in a less than 0.03% full-scale span (FSS).