2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) 2012
DOI: 10.1109/dft.2012.6378201
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Designing and implementing a Malicious 8051 processor

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Cited by 8 publications
(4 citation statements)
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“…There could be several ways to insert and implement hardware Trojans in IPs, depending upon their design, characteristics, activation, and actions. A variety of hardware Trojans submitted in the CSAW Embedded Systems Challenge [63][64][65] held in 2012, have been detected using functional testing, power analysis, and direct analysis of bit-file. A multi-faceted technique to detect Trojans in FPGAs has been demonstrated in [66], where the authors develop a Trojan detection framework leveraging testing techniques to identify different Trojans introduced in CSAW Embedded Systems Challenge.…”
Section: Related Workmentioning
confidence: 99%
“…There could be several ways to insert and implement hardware Trojans in IPs, depending upon their design, characteristics, activation, and actions. A variety of hardware Trojans submitted in the CSAW Embedded Systems Challenge [63][64][65] held in 2012, have been detected using functional testing, power analysis, and direct analysis of bit-file. A multi-faceted technique to detect Trojans in FPGAs has been demonstrated in [66], where the authors develop a Trojan detection framework leveraging testing techniques to identify different Trojans introduced in CSAW Embedded Systems Challenge.…”
Section: Related Workmentioning
confidence: 99%
“…Jin et al [21] presented eight RTL HTs to compromise the security of an Alpha encryption module. Santos and Fei [25] presented a backdoor Trojan, a bomb counter Trojan, and a power sink Trojan to weaken an 8051 processor performing RC‐5 encryption. Reece et al [26] presented DoS and data leakage Trojans to attack the Intel 8051 micro‐controller unit, which would probably run a data‐sensitive encryption algorithm.…”
Section: In‐house Design Team Attacksmentioning
confidence: 99%
“…The competition targets HT design and insertion techniques, Trojan detection approaches, and design hardening mechanisms. Many researchers have reported their Trojan designs implemented for the CSAW ESC competition [16, 21, 25, 26, 73]. Several Trojan design and implementations have been presented by Baumgarten et al [16] at CSAW ESC, including the following: information leakage through RS232 end sequence; RS232 multiple transmission rates; denial‐of‐service (DoS); thermal leakage; information leakage through amplitude modulation transmission; 50 MHz transmission; light‐emitting device transmission.…”
Section: In‐house Design Team Attacksmentioning
confidence: 99%
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