Detecting intermittent resistive faults in digital CMOS circuits

Ebrahimi, Hassan; Rohani, Alireza; Kerkhoff, Hans G.

doi:10.1109/dft.2016.7684075

Cited by 6 publications

(5 citation statements)

References 17 publications

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“…Timing violation along a data path can occur due to process, voltage and temperature variations, aging and IRF [7]. In-situ on-line monitoring techniques can be used for timing-error detection and correction in critical paths [4], timing slack measurements [6], adaptive voltage scaling [8], aging detection [9] and IRF detection as well [3].…”

Section: Related Workmentioning

confidence: 99%

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A New Monitor Insertion Algorithm for Intermittent Fault Detection

Ebrahimi

Kerkhoff

2020

2020 IEEE European Test Symposium (ETS)

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The dependability of highly dependable systems relies on the reliability of its components and interconnections. One of the most challenging faults that threatens the reliability of interconnections in a system are intermittent resistive faults (IRFs). They may occur randomly in time, duration and amplitude in every interconnection. The occurrence rate can vary from a few nanoseconds to months. As a result, evoking and detecting such faults is a major challenge. In this paper, IRF detection at the chip level has been tackled by utilising a fully digital insitu IRF monitor. This paper introduces a new algorithm for inserting IRF monitors in a design. The goal of this algorithm is to minimise the number of IRF monitors while providing a high fault coverage for IRFs. The algorithm has been validated using software-based fault injection. The simulation results show that the proposed algorithm improves the IRF coverage at the chip level at the cost of a small area and power-consumption overhead.

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Section: Related Workmentioning

confidence: 99%

“…Therefore, conventional test methods are highly unlikely to detect these faults. Two alternative methods for intermittent fault detection are periodic testing [2] and in-situ on-line monitoring [3]. The periodic testing method is basically retesting the system periodically which increases the probability of detecting intermittent faults.…”

Section: Introductionmentioning

confidence: 99%

A New Monitor Insertion Algorithm for Intermittent Fault Detection

Ebrahimi

Kerkhoff

2020

2020 IEEE European Test Symposium (ETS)

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“…17 With some modi¯cations, the in situ on-line monitoring techniques can be used for IRF detection at the chip levels as well. 5 For adapting on-line monitoring techniques for IRF detection, we need to focus on the di®erence between intermittent faults and other timing faults. The main di®erence is that IRFs can cause random timing violations.…”

Section: To Monitor Degradation In Connectorsmentioning

confidence: 99%

“…The IRFs have been modeled based on some IRF measurements. 2,5 In this model, a burst of IRF pulses is generated based on six parameters. These parameters are the following: The number of pulses in a burst (burst length).…”

Section: Intermittent Resistive Faults Modelmentioning

confidence: 99%

A Digital On-Line Monitor for Detecting Intermittent Resistance Faults at Board Level

Ebrahimi

Kerkhoff

2019

J CIRCUIT SYST COMP

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The reliability of board-level data communications intensively depends on the reliability of interconnections on a board. One of the most challenging interconnections reliability threats is intermittent resistive faults (IRFs). Detecting such faults is a major challenge. The main reason is the random behavior of these faults. They may occur randomly in time, duration and amplitude. The occurrence rate can vary from a few nanoseconds to months. This paper investigates IRF detection at the board level by introducing a new digital in situ IRF monitor. Hardware-based fault injection has been used to validate the proposed IRF monitor. As case studies, two widely used on-board transmission protocols namely the Universal Asynchronous Receiver Transmitter (UART) and the Serial Peripheral Interface bus (SPI), have been used. In addition, one fault management framework, based on the IJTAG standard, has been implemented to collect and characterize information from the monitors. The experimental results show that the proposed monitor is effective in detecting IRFs at the board level.

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“…As a result, we discovered the most sensitive parts to IRFs, which subsequently was extended to real hardware measurements, including the implementation of an IRF fault generator [EBR16a], showing indeed the predicted failures in a CMOS universal asynchronous receiver/transmitter (UART). The next step was the development of an IRF detector [EBR16b] which can start-up a logging of environmental conditions, thereby enhancing the diagnostic capabilities significantly.…”

Section: A Investigation Of the No Fault Found Phenomenonmentioning

confidence: 99%

BASTION: Board and SoC test instrumentation for ageing and no failure found

Jutman¹,

Lotz²,

Larsson

et al. 2017

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2017

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This is an overview paper that motivates and describes performed work done in the European Commission funded research project BASTION, which focuses on two critical problems of modern electronics: the No-Fault-Found (NFF) and CMOS ageing. New defect classes contributing to NFF have been identified, including timing related faults (TRF) at board level and intermittent resistive faults (IRF) at IC level. BASTION has addressed the mechanisms of ageing and developed several techniques to improve the longevity of electronic products. Embedded Instrumentation, monitors, and IEEE 1687 standard for reconfigurable scan networks (RSN) are seen as an important leverage that helped mitigating the impact of the above listed problems by facilitating a low-latency, scalable online system health monitoring and error localization infrastructure as well as integration of all heterogeneous technologies into a homogeneous demonstration platform. This paper helps the reader to get a general overview of the work performed and provides a collection of references to publications where the respective research results are described in detail.

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Detecting intermittent resistive faults in digital CMOS circuits

Cited by 6 publications

References 17 publications

A New Monitor Insertion Algorithm for Intermittent Fault Detection

A New Monitor Insertion Algorithm for Intermittent Fault Detection

A Digital On-Line Monitor for Detecting Intermittent Resistance Faults at Board Level

BASTION: Board and SoC test instrumentation for ageing and no failure found

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