Detecting signal-overshoots for reliability analysis in high-speed system-on-chips

Nourani, Mehrdad; Attarha, Amir

doi:10.1109/tr.2002.804491

Cited by 21 publications

(11 citation statements)

References 23 publications

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“…This represents a reliability issue. Proposals to test overshoots representing a reliability issue can be found in [19] and [22]. Signals must also satisfy an allowed skew region [15].…”

Section: Signal Integrity Qualitymentioning

confidence: 99%

Built-In Sensor for Signal Integrity Faults in Digital Interconnect Signals

Champac

Avendano²,

Figueras

2010

IEEE Trans. VLSI Syst.

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Abstract-Testing of signal integrity (SI) in current high-speed ICs, requires automatic test equipment test resources at the multigigahertz range, normally not available. Furthermore, for most internal nets of state-of-the-art ICs, external speed testing is not possible for the newest technologies. In this paper, on-chip testing for SI faults in digital interconnect signals, using built-in high speed monitors, is proposed. A coherent sampling scheme is used to capture the signal information. Two monitors to test SI violations are proposed: one for undershoots at the high logic level and the other for overshoots at the low logic level. The monitors are capable of detecting small noise pulses and have been extended to test sequentially more than one signal. The cost of the proposed strategy is analyzed in terms of area, delay penalization, and test time. The effects of clock jitter and process variations are analyzed. Experimental results obtained in designed and fabricated circuits show the feasibility of the proposed testing strategy. A good agreement appears between the theoretical analysis, simulation results, and the experimental measurements.

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“…This represents a reliability issue. Proposals to test overshoots representing a reliability issue can be found in [19] and [22]. Signals must also satisfy an allowed skew region [15].…”

Section: Signal Integrity Qualitymentioning

confidence: 99%

Built-In Sensor for Signal Integrity Faults in Digital Interconnect Signals

Champac

Avendano²,

Figueras

2010

IEEE Trans. VLSI Syst.

View full text Add to dashboard Cite

show abstract

“…However, these ILS cells cannot detect signal overshoots. Nourani and Attarha presented an ILS cell design to address this problem [20]. Their overshoot detector, however, cannot detect overshoots that occur in all situations, as described in Section 3.…”

Section: Related Prior Workmentioning

confidence: 99%

“…It is therefore important to detect the occurrences of overshoots in all possible situations as part of the manufacturing test flow. Figure 2 compares the overshoot detector presented in [20] with the one proposed in this paper. As shown in Figure 2(a), the overshoot detector in [20] is composed of a cross-coupled differential amplifier (T 1 -T 5 ) and an inverter (used to stabilize the output voltage).…”

Section: Proposed Overshoot Detectormentioning

confidence: 99%

“…Figure 2 compares the overshoot detector presented in [20] with the one proposed in this paper. As shown in Figure 2(a), the overshoot detector in [20] is composed of a cross-coupled differential amplifier (T 1 -T 5 ) and an inverter (used to stabilize the output voltage). The input V in1 takes the signal from the victim interconnect and compares it with the other input V in2 , which is connected to power supply V dd .…”

Section: Proposed Overshoot Detectormentioning

confidence: 99%

“…In this paper, at the interconnect receiving side, we also design a new overshoot detector, which, compared to the one introduced in [20], is able to detect overshoots in all possible situations.…”

Section: Introductionmentioning

confidence: 99%

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