Determination of on-chip temperature gradients on reconfigurable hardware

Tradowsky, Carsten; Cordero, Enrique; Deuser, Thorsten; Hübner, Michael; Becker, J.

doi:10.1109/reconfig.2012.6416738

Cited by 8 publications

(4 citation statements)

References 10 publications

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“…Other work shows that self-heating caused by designs on an FPGA can lead to a 8 • C temperature diference on diferent locations of the device [7,28]. While this is not a substantial diference across the chip, in this work the authors had only ive ROs running on the chip, so the produced heat would likely be much lower than our experiments.…”

Section: Aging Causementioning

confidence: 68%

Inducing Non-uniform FPGA Aging Using Configuration-based Short Circuits

Cook

Arscott

George

et al. 2022

ACM Trans. Reconfigurable Technol. Syst.

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This work demonstrates a novel method of accelerating FPGA aging by configuring FPGAs to implement thousands of short circuits, resulting in high on-chip currents and temperatures. Patterns of ring oscillators are placed across the chip and are used to characterize the operating frequency of the FPGA fabric. Over the course of several months of running the short circuits, with daily characterization of the FPGA performance, we demonstrate a decrease in FPGA frequency of 8.5%. We demonstrate that this aging is induced in a non-uniform manner. In, two-thirds of the configurable fabric contains short circuits. The maximum slowdown outside of the shorted regions is 2.1%, or about a fourth of the maximum slowdown that is experienced inside the shorted region. In addition, we demonstrate that the slowdown is linear after the first two weeks of the experiment and is unaffected by a recovery period. Additional experiments involving short circuits are also performed to demonstrate the results of our initial experiments are repeatable. These experiments also use a more fine-grained characterization method that provide further insight into the non-uniformed nature of the aging caused by short circuits.

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Section: Aging Causementioning

confidence: 68%

Inducing Non-uniform FPGA Aging Using Configuration-based Short Circuits

Cook

Arscott

George

et al. 2022

ACM Trans. Reconfigurable Technol. Syst.

View full text Add to dashboard Cite

show abstract

“…While there are not many run-time prediction methods, many temperature sensing methods are observed. These methods make use of sensors which sense the temperature profile of the die [170,171,172,173,174,175,176,177,178,179] and based on the sensed temperature, different dynamic adaptation methods can be applied. The use of sensors assumes the use of task-based thermal management techniques.…”

Section: Consumption and Die Temperature Predictionmentioning

confidence: 99%

A Decision-Making Method for Run-Time Structural Adaptation Of FPGA-Based SOCS to Variations in Workload, Power Budget, Die Temperature, and Hardware Resources

Sharma

2024

Preprint

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<p>Embedded systems for application domains like robotics, aerospace, defense, etc. nowadays are developed on System-on-Chip (SoC) platforms based on Field Programmable Gate Array (FPGA) devices to support computation-intensive multi-task multi-modal dynamic workloads common for these applications. These systems therefore face the challenge to sustain the performance of their dynamic workloads in presence of variations in power budget, die temperature, and/or occurrence of hardware faults. This work proposes Run-time Structural Adaptation (RTSA) as a mechanism for mitigating these factors. One of the major contributions of this work is creation of a run-time decision-making method, ‚ÄúExplorer‚Äù, to carry out RTSA for FPGA-based SoCs and mitigate variations in the internal and external factors simultaneously. Whenever there is a change in the system‚Äôs set of constraints, Explorer selects an appropriate variant of hardware processing circuit for each active task from a large design space to form a system conÔ¨Åguration that satisÔ¨Åes each task‚Äôs performance speciÔ¨Åcation and all other system constraints. To support the practical deployment of Explorer, this work presents a method to derive run-time power consumption and die temperature estimation models for any FPGA-based device. This novel methodology of model derivation based on the FPGA platform and application running on it is another contribution of this work. The model derivation methods are formulated after detailed experimental analysis of power consumption and thermal behaviors of recent FPGA devices. Explorer can evaluate potential system conÔ¨Ågurations using the derived models to select a suitable system conÔ¨Åguration for RTSA. Experimental implementation of Explorer on the Zynq XC7Z020 SoC shows worst case execution time of 130 us, which demonstrates its suitability for RTSA for most applications associated with multi-stream computation-intensive tasks. This work also proposes an approach for automating model derivation which helps systems self-derive their model coefficients during system production and re-derive them due to changes in system platform, application, and/or environmental conditions. This significantly reduces model derivation time while avoiding any human involvement. This work thus presents the methods and models necessary to enable real systems utilizing FPGA devices to carry out RTSA and sustain their dynamic workloads amid dynamic environmental and hardware resource constraints.</p>

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“…A variety of ring-oscillator-based sensors and sensors based on other circuits have been developed, which sense the temperature profile of the die. Based on this, different dynamic adaptation methods can be applied [20][21][22][23][24][25][26][27][28][29]. e use of sensors assumes the use of task-based thermal management techniques.…”

Section: Literature Reviewmentioning

confidence: 99%

A Method for Run-Time Prediction of On-Chip Thermal Conditions in Dynamically Reconfigurable SOPCs

Sharma

Kirischian

2021

International Journal of Reconfigurable Computing

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Autonomous mobile systems nowadays deploy FPGA-based System on Programmable Chips (SoPCs) for supporting their dynamic multitask multimodal workloads. For such field-deployed systems, activation times, execution periods of tasks, and variations in environmental conditions are usually difficult to predict. These dynamic variations result in a new challenge of dynamic thermal cycling stress on the SoPC die, which can result in transient and even permanent hardware faults in the computing system. This paper proposes the approach of run-time structural adaptation (RTSA) to mitigate dynamic thermal cycling stress on the SoPC dies. RTSA assumes the tasks to have multiple implementation variants, called Application Specific Processing (ASP) circuit variants, which vary in hardware resources, operating frequency, and power consumption. Dynamically reconfiguring appropriate ASP circuit variants of tasks allow systems to maintain their die temperature in the desired range while taking into account variations in power budget and modes of operation. This means the essence of RTSA is a decision-making mechanism which can select at run-time, a suitable system configuration (set of ASP circuit variants of active tasks), whenever needed, to meet the die temperature constraints. To do so, run-time die temperature prediction for potential system configurations using an estimation model is required. This paper presents a generic method to derive an analytical model for any SoPC that can estimate the die temperature in real time and thus support the decision-making mechanism. To develop this method, the thermal behavior of SoPC die under different task scenarios is studied and relation of die temperature to frequency, resource utilization, and power consumption is analyzed. An RTSA-enabled experimental platform is set up on Xilinx Zynq XC7Z020 SoPC for this purpose. Experimental results also demonstrate that the proposed method can be used to derive a model in run-time, thus enabling systems to self-derive and dynamically update the model in run-time.

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Determination of on-chip temperature gradients on reconfigurable hardware

Cited by 8 publications

References 10 publications

Inducing Non-uniform FPGA Aging Using Configuration-based Short Circuits

Inducing Non-uniform FPGA Aging Using Configuration-based Short Circuits

A Decision-Making Method for Run-Time Structural Adaptation Of FPGA-Based SOCS to Variations in Workload, Power Budget, Die Temperature, and Hardware Resources

A Method for Run-Time Prediction of On-Chip Thermal Conditions in Dynamically Reconfigurable SOPCs

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