Development of a design-for-reliability method for complex systems

Poncelin, Guillaume; Derain, Jean-Pierre; Cauvin, Aline; Dufrene, D.

doi:10.1109/rams.2008.4925791

Cited by 4 publications

(5 citation statements)

References 1 publication

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“…Otherwise these levels can be swapped with each other in order to reduce the number of TCK cycles. The reason is that according to (8) having the junctions on the upper levels is more expensive (in terms of TCK cycles required for fault localization) than on lower levels.…”

Section: Methods Of Building An Optimized Dinmentioning

confidence: 99%

“…Using formula (8) and the set of constraints (9) it is possible to find the optimal structure of DIN (with the smallest possible T worst ). The corresponded values L and m i can be found by using any generalpurpose constraint solver or specially developed searching algorithm.…”

Section: Methods Of Building An Optimized Dinmentioning

confidence: 99%

“…According to (8) and arguments above, T worst ¼ 90, hence, in the worst case 90 TCK cycles are required to perform fault diagnosis. An abstract representation of such optimal DIN is presented in Figure 4.…”

Section: Examplementioning

confidence: 99%

“…It is based on fault tolerance concepts but goes beyond by localizing and classifying faults into, e.g., transient versus permanent and critical versus low-priority ones [8]. Blocks with permanent faults are then either fully isolated or marked as reduced-capacity ones.…”

mentioning

confidence: 99%

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Effective Scalable IEEE 1687 Instrumentation Network for Fault Management

Jutman¹,

Devadze²,

Shibin

2013

IEEE Des. Test

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Section: Methods Of Building An Optimized Dinmentioning

confidence: 99%

Section: Methods Of Building An Optimized Dinmentioning

confidence: 99%

Section: Examplementioning

confidence: 99%

mentioning

confidence: 99%

See 2 more Smart Citations

Effective Scalable IEEE 1687 Instrumentation Network for Fault Management

Jutman¹,

Devadze²,

Shibin

2013

IEEE Des. Test

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“…transient vs. permanent and critical vs. low-priority ones [8]. Blocks with permanent faults are then either fully isolated or marked as reduced-capacity ones.…”

Section: Introductionmentioning

confidence: 99%

Invited paper: System-wide fault management based on IEEE P1687 IJTAG

Jutman¹,

Devadze²,

Aleksejev

2011

6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)

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Fault tolerance and fault management mechanisms are necessary means to reduce the impact of soft errors and wear out in electronic devices. The semiconductor products manufactured with latest and emerging processes are increasingly affected by these effects. The paper describes a new general scalable fault management architecture based on the latest upcoming DFT standard IEEE P1687 IJTAG. The standard allows to create an efficient and regular network for handling fault detection information as well as to manage test and system resources as a system-wide background process during the system operation.

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