Microfluidic networks represent the milestone of microfluidic devices. Recent advancements in microfluidic technologies mandate complex designs where both hydraulic resistance and pressure drop across the microfluidic network are minimized, while wall shear stress is precisely mapped throughout the network. In this work, a combination of theoretical and modeling techniques is used to construct a microfluidic network that operates under minimum hydraulic resistance and minimum pressure drop while constraining wall shear stress throughout the network. The results show that in order to minimize the hydraulic resistance and pressure drop throughout the network while maintaining constant wall shear stress throughout the network, geometric and shape conditions related to the compactness and aspect ratio of the parent and daughter branches must be followed. Also, results suggest that while a "local" minimum hydraulic resistance can be achieved for a geometry with an arbitrary aspect ratio, a "global" minimum hydraulic resistance occurs only when the aspect ratio of that geometry is set to unity. Thus, it is concluded that square and equilateral triangular cross-sectional area microfluidic networks have the least resistance compared to all rectangular and isosceles triangular cross-sectional microfluidic networks, respectively. Precise control over wall shear stress through the bifurcations of the microfluidic network is demonstrated in this work. Three multi-generation microfluidic network designs are considered. In these three designs, wall shear stress in the microfluidic network is successfully kept constant, increased in the daughter-branch direction, or decreased in the daughter-branch direction, respectively. For the multi-generation microfluidic network with constant wall shear stress, the design guidelines presented in this work result in identical profiles of wall shear stresses not only within a single generation but also through all the generations of the microfluidic network under investigation. The results obtained in this work are consistent with previously reported data and suitable for a wide range of lab-on-chip applications.