Development of a hybrid emulation platform based on RTDS and reconfigurable power converter-based testbed

Zhang, Shuoting; Ma, Yiwei; Yang, Liu; Wang, Fred; Tolbert, Leon M.

doi:10.1109/apec.2016.7468310

Cited by 13 publications

(3 citation statements)

References 12 publications

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“…As listed in Table 2, a minimum of delay time present in the experimental PHIL setup is 152.5 µs. Note that T f ilt is compensated by adding a phase angle in the Park transformation, as done in [24] and [25]. We vary the values of R S and R L from 0.1 Ω to 20 Ω in discrete manner and plot the stability regions (the region enclosed by dashed lines) of ITM and the proposed method, as shown in Fig.…”

Section: A Case 1: Ls >Llmentioning

confidence: 99%

New Power Interface Based on Multi-Dimensional Golden Section Search Algorithm for Power-Hardware-in-the-Loop Applications

Constantine,

Lian,

Fan

et al. 2024

IEEE Access

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Power-Hardware-in-the-Loop (PHIL) is a kind of real-time simulation, capable of exchanging not just low-voltage, low current signals, but the power required by the power device under test (PDuT). PHIL requires a PDuT to be connected to a real-time digital power network simulator via a power interface (PI). There have been quite a few PIs proposed in the past. Among them, ideal transformer model (ITM) is the most commonly used due to its ease of implementation. Other PIs such as partial circuit duplication and damping impedance can be considered as an extended version of ITM. These PIs need to follow a strict impedance ratio between PDuT and the rest of the system prior to the PHIL implementation, which could be a tedious and difficult task. This paper proposed a new PI for PHIL based on multi-dimensional golden section search algorithm, which can eliminate such a constraint. The proposed method has been shown to have wider stability regions when PDuT is a passive device or active one such as an inverter based resource. Moreover, dynamic responses of the proposed method are similar to those of the ITM under stable conditions. The validity of the proposed method has been justified with offline simulation and experimental PHIL setups.INDEX TERMS Real-Time Simulation, Power Hardware-in-the-Loop (PHIL), Golden Section Search (GSS), Gauss-Seidel, Power Amplifier.

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Section: A Case 1: Ls >Llmentioning

confidence: 99%

New Power Interface Based on Multi-Dimensional Golden Section Search Algorithm for Power-Hardware-in-the-Loop Applications

Constantine,

Lian,

Fan

et al. 2024

IEEE Access

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“…Typically, a number of emulators, each emulating a particular component, are connected together to form a hardware test bed (HTB) for the emulation of power systems [18]. In practice, the HTB can only emulate limited power network and its stability issues will be more severe due to the multiple power interfaces among the multiple emulators [2,19,20]. For the power system hybrid simulation, a power network in loop method in which the equipment can be interfaced with a digital simulator were discussed [21] and a PHIL simulation was used for laboratory education of modern power systems for the first time [22].…”

Section: Introductionmentioning

confidence: 99%

Applications of Digital-Physical Hybrid Real-Time Simulation Platform in Power Systems

et al. 2018

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Digital-physical hybrid real-time simulation (hybrid simulation) platform integrates the advantages of both digital simulation and physical simulation by combining the physical simulation laboratory and the real-time digital simulator. Based on a 400 V/50 kVA hybrid simulation platform with 500 kVA short-circuit capacity, the hybrid simulation methodology and a Hausdorff distance based accuracy evaluation method are proposed. The case validation of power system fault recurrence is performed through this platform, and the stability and accuracy are further validated by comparing the hybrid simulation waveform and field-recorded waveform and by evaluating the accuracy with the proposed error index. Two typical application scenarios in power systems are studied subsequently. The static var generator testing shows the hybrid simulation platform can provide system-level testing conditions for power electronics equipment conveniently. The low-voltage ride through standard testing of a photovoltaic inverter indicates that the hybrid simulation platform can be also used for voltage standard testing for various power system apparatus with low cost. With this hybrid simulation platform, the power system simulation and equipment testing can be implemented with many advantages, such as short period of modelling, flexible modification of parameter and network, low cost, and low risk. Based on this powerful tool platform, there will be more application scenarios in future power systems.

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“…In [9], [11], the conventionally identified time delay is compensated by phase-shifting the amplified voltage setpoint and the feedback current respectively. In [12] the time delay is compensated by adding a phase angle in the Park transformation, however neither the amount of time delay compensated nor how it was calculated are explained. When a time delay compensation method is implemented, a decrease of the overall time delay will help to further improve the accuracy of the simulation results with faster dynamics.…”

mentioning

confidence: 99%

Characterization of Time Delay in Power Hardware in the Loop Setups

Guillo-Sansano

Syed

Roscoe³

et al. 2021

IEEE Trans. Ind. Electron.

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The testing of complex power components by means of power hardware in the loop (PHIL) requires accurate and stable PHIL platforms. The total time delay typically present within these platforms is commonly acknowledged to be an important factor to be considered due to its impact on accuracy and stability. However, a thorough assessment of the total loop delay in PHIL platforms has not been performed in the literature. Therefore, time delay is typically accounted for as a constant parameter. However, with the detailed analysis of the total loop delay performed in this paper, variability in time delay has been detected as a result of the interaction between discrete components. Furthermore, a time delay characterization methodology (which includes variability in time delay) has been proposed. This will allow for performing stability analysis with higher precision as well as to perform accurate compensation of these delays. The implications on stability and accuracy that the time delay variability can introduce in PHIL simulations has also been studied. Finally, with an experimental validation procedure, the presence of the variability and the effectiveness of the proposed characterization approach have been demonstrated. Index Terms-Time delay, power hardware-in-the-loop, delay identification, real-time simulation, component testing. NOMENCLATURE Abbreviations AC Alternating current. ADC Analog to digital converter. DAC Digital to analog converter. DC Direct current. DRTS Digital real time simulator. FPGA Field-Programmable Gate Array. GPS Global positioning system. HUT Hardware under test. IA Interface algorithm. ITM Ideal transformer method.

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Development of a hybrid emulation platform based on RTDS and reconfigurable power converter-based testbed

Cited by 13 publications

References 12 publications

New Power Interface Based on Multi-Dimensional Golden Section Search Algorithm for Power-Hardware-in-the-Loop Applications

New Power Interface Based on Multi-Dimensional Golden Section Search Algorithm for Power-Hardware-in-the-Loop Applications

Applications of Digital-Physical Hybrid Real-Time Simulation Platform in Power Systems

Characterization of Time Delay in Power Hardware in the Loop Setups

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