2017
DOI: 10.1109/lmwc.2016.2646914
|View full text |Cite
|
Sign up to set email alerts
|

Development of a Parallel-FET Linearization Technique for High Efficiency GaN Power Amplifiers

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
5

Citation Types

0
6
0

Year Published

2021
2021
2023
2023

Publication Types

Select...
3
2

Relationship

0
5

Authors

Journals

citations
Cited by 9 publications
(6 citation statements)
references
References 8 publications
(9 reference statements)
0
6
0
Order By: Relevance
“…Such significant back-offs exacerbate the PA output power and efficiency, leading to high power consumption, which entails nonlinear effects in the form of intrinsic parasitic capacitances of the power transistor. Recent literature has made efforts to improve the PA linearity at the circuit level using an in-package 2,3 or a combiner network-based [4][5][6] distortion correction method. These contributions have significantly reduced the design overheads of external PA equalization (PD) systems.…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation
“…Such significant back-offs exacerbate the PA output power and efficiency, leading to high power consumption, which entails nonlinear effects in the form of intrinsic parasitic capacitances of the power transistor. Recent literature has made efforts to improve the PA linearity at the circuit level using an in-package 2,3 or a combiner network-based [4][5][6] distortion correction method. These contributions have significantly reduced the design overheads of external PA equalization (PD) systems.…”
Section: Introductionmentioning
confidence: 99%
“…7 Thus, parallelly combined GaN HEMTs with opposite magnitudes can be employed to minimize AM-PM distortion effects. 4,6 Besides, it is also shown in Alt et al 8 that additional care is needed for optimal input matching network (IMN) and supply voltage as these can also be the other sources of AM-AM and AM-PM distortions (AM/PM). Furthermore, the precise mapping of fundamental and harmonic impedances is also important to evade variable load conditions for high-efficiency operation with linear AM/PM characteristics.…”
Section: Introductionmentioning
confidence: 99%
“…The origins of this behavior are the semiconductor physics of GaN, especially its nonlinear trans‐conductance and the thermal effect 11–13 . While the saturated output power in GaAs and LDMOS transistors occurs about 2–3 dB above the 1‐dB compression point, in GaN devices, it is about 3~8 dB leading to poor efficiency in their linear power range 14,15 . Several techniques have been applied to improve the linearity of GaN PAs; one of them is the second harmonic injection (SHI) which was developed in the early 1990s for the linearization of semiconductor amplifiers.…”
Section: Introductionmentioning
confidence: 99%
“…[11][12][13] While the saturated output power in GaAs and LDMOS transistors occurs about 2-3 dB above the 1-dB compression point, in GaN devices, it is about 3~8 dB leading to poor efficiency in their linear power range. 14,15 Several techniques have been applied to improve the linearity of GaN PAs; one of them is the second harmonic injection (SHI) which was developed in the early 1990s for the linearization of semiconductor amplifiers. For example, in, 16 using an SHI approach, the third-order intermodulation distortion (IMD3) of a 500 MHz MESFET amplifier is improved by 16 dB.…”
Section: Introductionmentioning
confidence: 99%
“…The design of a linear PA using different gate bias voltages for parallelly combined GaN HEMTs has been presented. [26,27] V gs of each subunit was adjusted independently, and the total power consisted of all subcell outputs. Considering the different g m values of the device under different V gs , the total g m can remain linear in the output power range and reduce IMD3.…”
Section: Introductionmentioning
confidence: 99%