Development of a radiation hardened NPN bipolar transistor for a 64 K CMOS fusible-link PROM

Abstract

A 1.2 pm CMOS production process was adapted to produce a 64K CMOS fusible-link Programmable Read-only Memory (PROM) for space applications. The circuit requirement of less than 50 nS access time combined with the need for 9 volt single pulse programming of the fusible links and radiation tolerance to levels over 300 Krad(Si) made close collaboration between design engineering, reliability engineering, and device engineering essential for a successful project. A vertical NPN bipolar transistor was integrated into a standard CMOS process to be used for programming and reading the fuses. The device characteristics were carefully matched to the product speed and programmability requirements. The NPN device was optimized for radiation performance. Successful development required extensive use of process and device modeling, test structure design and measurement, and experimental design methods.

A signal-conditioning chip for accelerometer applications

“…The area occupied by a single fuse is often the minimal as the width must be made narrow for ease of blowing in order to reduce programming time as well as programming current. Secondly, it offers a lower-cost and lower-power trimming solution [Fuller 1994] than the bipolar Zener-zap technique because it is fully compatible to standard CMOS process. Thirdly, it provides flexibility for different implementation of fusible link elements to suit required applications.…”

“…For instance, other than typical polysilicon, elements can be of Arsenic-doped polysilicon to ATTENTION: The Singapore Copyright Act applies to the use of this document. Nanyang Technological University Library reduce the programming voltage and current [Tanimoto 1982], or of Nichrome material for radiation hardening in space application [Fuller 1994], or of aluminum material for power devices , [Venkatraman 1996a]. Fourthly, it is well suited for offwafer trimming.…”