Electrical Performance of Electronic Packaging,
DOI: 10.1109/epep.2002.1057895
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Development of an organic micromachined isolation scheme for wafer-level packaging

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“…The low-temperature process could be used to create 3-D circuit components. Venkateshan et al [13] proposed using SU-8 in a micromachined isolation scheme where walls of SU-8 separated patch antennas and the isolation improvement was measured.…”
Section: Introductionmentioning
confidence: 99%
“…The low-temperature process could be used to create 3-D circuit components. Venkateshan et al [13] proposed using SU-8 in a micromachined isolation scheme where walls of SU-8 separated patch antennas and the isolation improvement was measured.…”
Section: Introductionmentioning
confidence: 99%