2000
DOI: 10.1016/s0924-4247(99)00346-5
|View full text |Cite
|
Sign up to set email alerts
|

Development of novel low temperature bonding technologies for microchip chemical analysis applications

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1
1

Citation Types

0
37
2
1

Year Published

2001
2001
2021
2021

Publication Types

Select...
6
1

Relationship

0
7

Authors

Journals

citations
Cited by 54 publications
(40 citation statements)
references
References 13 publications
0
37
2
1
Order By: Relevance
“…The required bonding temperature of a glass microchip depends on the type of glass used, and can be varied from the mid 5007C to the low 6007C [31,32,34]. Low-temperature glass bonding technologies were also reported [73]. An alternative bonding process by gluing two substrates together by epoxy was recommended by several groups [74,75].…”
Section: Bonding Techniquesmentioning
confidence: 99%
“…The required bonding temperature of a glass microchip depends on the type of glass used, and can be varied from the mid 5007C to the low 6007C [31,32,34]. Low-temperature glass bonding technologies were also reported [73]. An alternative bonding process by gluing two substrates together by epoxy was recommended by several groups [74,75].…”
Section: Bonding Techniquesmentioning
confidence: 99%
“…Other bonding processes involving PDMS or PDMS/glass devices are described in the literature as well [30,31]. In addition, many research groups have reported the bonding of glass microchips at room temperature without the requirements of cleanroom facilities [16,[32][33][34][35][36]. Such reported processes are strongly dependents of some factors as (i) multiple washing steps [32,33,35], (ii) need of an accurate holder to apply an equalized pressure between two glass plates [34] and (iii) still requiring instrumentation for sequential plasma activation of the glass surface [36].…”
Section: Introductionmentioning
confidence: 99%
“…A Photolithographic process followed by a HF etching step was used to create a channel on the chip, as described in detail elsewhere [11]. Brie¯y, the pyrex wafer was coated with a chromium layer (50 nm), a gold layer (200 nm) and the photoresist.…”
Section: Microchipsmentioning
confidence: 99%