Device Instability of ReRAM and a Novel Reference Cell Design for Wide Temperature Range Operation

Lin, Yu–Hsuan; Lin, Yu-Yu; Lee, Feng-Ming; Ho, Yung-Han; Hsu, K.C.; Lee, M. H.; Lee, D. Y.; Chiang, Kuang-Hao; Yang, Chin-Cheng; Li, C. H.; Wu, Syue-Ren; Lei, Chuanzhen; Lin, Chih-Yao; Chen, C. J.; Chen, K. H.; Lung, Hsiang-Lan; Wang, K. C.; Tseng, Tseung‐Yuen; Lu, Chih‐Yuan

doi:10.1109/led.2017.2732025

Cited by 11 publications

(4 citation statements)

References 8 publications

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“…Noise introduced by RTSs, random telegraph noise (RTN), is one of the most extensively investigated reliability issues in state-of-art CMOS devices [8]. First observed in 1984 [8,10], RTSs have been observed in MOSFETs [11,12,14,15], static random access memory (SRAM) [16,17], resistive random access memory (ReRAM) [18][19][20][21][22][23][24][25], and flash memory devices [26][27][28][29][30][31][32][33]. Overall, quantum mechanical effects were considered to be an obstacle for the silicon (Si) industry due to their negative impacts on the operation of CMOS circuits.…”

Section: Introductionmentioning

confidence: 99%

Single Electron Memory Effect Using Random Telegraph Signals at Room Temperature

et al. 2019

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We show a manipulation of a single electron at room temperature by controlling Random Telegraph Signals (RTSs) by voltage pulses. Our silicon nanowire triple-gate transistor exhibited RTSs when potential barriers were electrically created by two of the three gates. From the statistics of the signals, we optimized the voltage pulse such that a single electron was intentionally captured in the potential well, and the retention time of approximately 10 ms was observed in this memory operation. This study indicates that a single electron effect can be controllable in a form of RTSs at room temperature by electrically defining a potential well.

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Section: Introductionmentioning

confidence: 99%

Single Electron Memory Effect Using Random Telegraph Signals at Room Temperature

et al. 2019

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“…For example, zone melting, melting followed by slow cooling, melting combined with long‐time annealing, and multi‐step solid state reactions can be classified as equilibrium processes. In contrast, mechanical alloying, hot deformation, melt spinning (MS), and the self‐propagating high‐temperature synthesis (SHS) are typical examples of non‐equilibrium processes. In this section, we emphasize two non‐equilibrium synthesis approaches: melt spinning and SHS.…”

Section: Non‐equilibrium Preparation Of Multi‐scale Microstructural Tmentioning

confidence: 99%

“…The preparation of samples with multi‐scale structure by melt spinning, as demonstrated in the case of commercial Bi 2 Te 3 ‐based materials, is also applicable to other important TE materials, including CoSb 3 , clathrates, MnSi 1.75– x , and AgSbTe 2 . Skutterudite samples with the composition CoSb 2.75 Ge 0.05 Te 0.20 synthesized by MS‐SPS possessed numerous nanograins on the scale of several hundred nanometers and a large number of nanodots with the average diameter of 15–20 nm embedded in the skutterudite matrix.…”

Section: Non‐equilibrium Preparation Of Multi‐scale Microstructural Tmentioning

confidence: 99%

Multi‐Scale Microstructural Thermoelectric Materials: Transport Behavior, Non‐Equilibrium Preparation, and Applications

et al. 2017

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Considering only about one third of the world's energy consumption is effectively utilized for functional uses, and the remaining is dissipated as waste heat, thermoelectric (TE) materials, which offer a direct and clean thermal-to-electric conversion pathway, have generated a tremendous worldwide interest. The last two decades have witnessed a remarkable development in TE materials. This Review summarizes the efforts devoted to the study of non-equilibrium synthesis of TE materials with multi-scale structures, their transport behavior, and areas of applications. Studies that work towards the ultimate goal of developing highly efficient TE materials possessing multi-scale architectures are highlighted, encompassing the optimization of TE performance via engineering the structures with different dimensional aspects spanning from the atomic and molecular scales, to nanometer sizes, and to the mesoscale. In consideration of the practical applications of high-performance TE materials, the non-equilibrium approaches offer a fast and controllable fabrication of multi-scale microstructures, and their scale up to industrial-size manufacturing is emphasized here. Finally, the design of two integrated power generating TE systems are described-a solar thermoelectric-photovoltaic hybrid system and a vehicle waste heat harvesting system-that represent perhaps the most important applications of thermoelectricity in the energy conversion area.

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“…This paper uses ReRAM as an example to discusses the influence of memory reliability in the analog convolution neural network (CNN). 13,23) The impact on inference accuracy from incorrect weights due to programming error, 24,25) read fluctuation, [25][26][27] retention loss, 27,28) and the weighterror sensitivity in different convolution layers are discussed. Moreover, a batch normalization (BN) calibration technique is proposed to recover the inference accuracy.…”

Section: Introductionmentioning

confidence: 99%

Impacts and solutions of nonvolatile-memory-induced weight error in the computing-in-memory neural network system

Lin

Lee

Wang

et al. 2020

Jpn. J. Appl. Phys.

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Nonvolatile-memory-based computing-in-memory architecture is one of the solutions to the massive data movement problem in the conventional von Neumann computing architecture since multiplication-and-accumulation (MAC) operations can be directly performed inside the memory array. This paper investigates the errors from the imperfections of resistive random access memory, including program error, read fluctuation and retention drift, and their impacts on the inference accuracy in convolutional neural network. The influences from weight errors in each convolution layer are evaluated according to the change of neuron distributions. A batch normalization (BN) parameter calibration method is proposed in order to correctly scale-and-shift the MAC results to compensate weight errors. This calibrated BN process drastically improves the inference accuracy not only for as-programmed analog ReRAM array but also for devices after longtime retention. This approach provides an effective direction to deal with the nonvolatile-memory-induced errors in artificial neural networks.

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Device Instability of ReRAM and a Novel Reference Cell Design for Wide Temperature Range Operation

Cited by 11 publications

References 8 publications

Single Electron Memory Effect Using Random Telegraph Signals at Room Temperature

Single Electron Memory Effect Using Random Telegraph Signals at Room Temperature

Multi‐Scale Microstructural Thermoelectric Materials: Transport Behavior, Non‐Equilibrium Preparation, and Applications

Impacts and solutions of nonvolatile-memory-induced weight error in the computing-in-memory neural network system

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