Device simulation of GeSe homojunction and vdW GeSe/GeTe heterojunction TFETs for high-performance application

Abstract

Compared with a 2D homogeneous channel, the introduction of a 2D/2D homojunction or heterojunction is a promising method to promote the performance of a TFET mainly by controlling the tunneling barrier. We simulate the 10-nm-Lg double-gated GeSe homojunction TFETs and vdW GeSe/GeTe heterojunction TFETs using the ab initio quantum transport calculations. Two constructions are considered for both the homojunction and heterojunction TFETs by placing the BL GeSe and vdW GeSe/GeTe heterojunction as the source or drain while the channel and the remaining drain or source use ML GeSe. The on-state current (Ion) of the optimal n-type BL-ML GeSe source homojunction TFET and the optimal p-type vdW GeSe/GeTe drain heterojunction TFET are 2320 and 2387 μA μm -1 , respectively, which are 50% and 64% larger than Ion of the ML GeSe homogeneous TFET. Inspiringly, the device performances (Ion, intrinsic delay time τ, and power delay product PDP) of both the optimal ntype GeSe homojunction and p-type vdW GeSe/GeTe heterojunction TFETs meet the requirement of the International Roadmap for Device and Systems high-performance device for the year of 2034 (2020 version).

Toward Nanoscale Organic Tunnel Field-Effect Transistors with Small Subthreshold Swing and High On-State Current: A Computational Design Based on Two-Dimensional Covalent-Organic Frameworks

“…This value is much larger than that of most inorganic TFETs (usually on the order of 1 μA/μm), , and it also fulfills the IRDS 2025 requirement for both low-power (LP) and high-performance (HP) devices (546 μA/μm and 873 μA/μm, respectively) . The I on is still comparable to that of other TFETs even when the bias is reduced to be as small as 10 –3 V. We note that most inorganic TFETs operate under bias in the range of 0.5–1 V. − While various strategies were proposed to lift the I on in TFETs, , the I on under lower bias is even orders of magnitude smaller than that under the normal bias (0.5–1 V). , As such, our results strongly suggest that the double-layer OTFET designed here is very promising for the LP application. Moreover, it is also instructive to compare our results with other novel heterojunction devices. ,− For instance, the SS of heterojunction FETs, such as those based on IGZO (indium–gallium–zinc oxide) and kagome lattice Si, is usually above 70 mV/dec, which is much higher than that of the double-layer OTFET in this work.…”

“…31 The I on is still comparable to that of other TFETs even when the bias is reduced to be as small as 10 −3 V. We note that most inorganic TFETs operate under bias in the range of 0.5−1 V. 32−34 While various strategies were proposed to lift the I on in TFETs, 35,36 the I on under lower bias is even orders of magnitude smaller than that under the normal bias (0.5−1 V). 37,38 As such, our results strongly suggest that the double-layer OTFET designed here is very promising for the LP application. Moreover, it is also instructive to compare our results with other novel heterojunction devices.…”

On-State Current Optimization for SnSe2 Tunneling Field Effect Transistors with Silicene Electrodes

“…(c) SS and (d) g m as a function of V dd of the optimal 10 nm-L g n-and p-type SnSe 2 HetJ-TFETs compared with other 2D TFETs. 13,14 ACS Applied Electronic Materials We notice the transfer characteristics are not quite smooth; e.g. the current of the optimal n-type SnSe 2 HetJ-TFET at V g = 0.8 V seems lower.…”

“…τ increases with decreasing V DD due to the obvious decrease in I ON , while PDP decreases with decreasing V DD . Specifically, τ(LP/HP) of 0.28−0.51/0.21−0.64 ps of the optimal n-type SnSe 2 HetJ-TFETs at V DD = 0.4−0.5/0.3−0.5 V surpasses the IRDS LP/ HP target of 1.281/0.88 ps for the year 2037 at V DD = 0.6 V. 17 All PDP(LP/HP) values of 0.042−0.156/0.060−0.206 fJ/μm for both the optimal n-and p-type SnSe 2 HetJ-TFETs at V DD = 0.3−0.5 V surpass the IRDS LP/HP target of 0.4/0.4 fJ/μm for the year 2037 at V DD = 0.6 V. 17 We compare I ON as a function of V DD of the optimal n-or ptype SnSe 2 HetJ-TFETs, i.e., p-or n-doped silicene/SnSe 2 as the electrode, with several other 2D HetJ-TFETs 13,14 in Figure 4a, b and compare the subthreshold swing (SS…”

“…From the comparison of the device performances (Table S1), the n-type SnSe 2 HetJ-TFET at a lower concentration shows slight improvements in terms of I ON , τ, PDP, and g m . ) I on as a function of V dd of the optimal 10 nm-L g n-and p-type SnSe 2 HetJ-TFETs compared with other 2D TFETs 13,14 and IRDS requirements for the year 2037 17 for LP (a) and HP (b) applications. (c) SS and (d) g m as a function of V dd of the optimal 10 nm-L g n-and p-type SnSe 2 HetJ-TFETs compared with other 2D TFETs.…”