DFE Error Propagation Mitigation Using Feed Forward Equalizer and Forward Error Correction in 25 Gb/s NRZ Transceiver

Abstract

In order to mitigate DFE error propagation to reduce bit error rate (BER), a 25[Formula: see text]Gb/s Non-Return-To-Zero (NRZ) transceiver including a five-tap decision feedback equalizer (DFE) combined with a dedicated feed forward equalizer (FFE) was first constructed and was found to be helpful in improving signal integrity and reduce errors in high-speed data transmission, which can lead to more reliable and efficient communication. In this transceiver, the effect of multi-tap FFE on error probability with different burst error run lengths was evaluated through a cumulative-probability distribution model. Then, forward error correction (FEC) with different correction capabilities can be also employed to correct burst errors for a better BER performance. Probability-based BER with single/double burst error correcting FEC was derived and a joint optimization of FFE and FEC can be further explored to achieve the target BER. Results show that compared with two-tap FFE, FFE with a post-cursor tap can obtain a BER improvement of 1.5[Formula: see text]dB at the BER of [Formula: see text], and also enlarge the horizontal opening degree of DFE, which is 0.74 unit interval (UI). Double burst error correcting FEC obtaining 2.2[Formula: see text]dB coding gain at the BER of [Formula: see text] outperforms single one. When the FEC error correcting capability is 16, the combination of double burst error correcting FEC and three-tap FFE can reduce BER from [Formula: see text] to approximately [Formula: see text]. FEC with a larger error correction capability is more likely to achieve the target BER and reduce the complexity of the combination equalizer while ensuring a better equalization performance. The proposed NRZ transceiver, as a part of the physical interface, can be applied to high-speed interconnection scenarios, such as Ethernet, PCIe, and Chiplet.