Differential Power Analysis of XMSS and SPHINCS

Kannwischer, Matthias J.; Genêt, Aymeric; Butin, Denis; Krämer, Juliane; Buchmann, Johannes

doi:10.1007/978-3-319-89641-0_10

Cited by 31 publications

(4 citation statements)

References 25 publications

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“…Power side-channels on FPGA implementations of McEliece PQC was shown in [45]. Differential power side-channels were revealed in PQC XMSS and SPHINCS [46]. Resource-efficient fault attacks on pqm4 implementations are shown by [26].…”

Section: Code Subversion Detection Resultsmentioning

confidence: 99%

Fuzzing+Hardware Performance Counters-Based Detection of Algorithm Subversion Attacks on Post-Quantum Signature Schemes

Chowdhury,

Mahapatra,

Soni

et al. 2022

Preprint

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NIST is standardizing Post Quantum Cryptography (PQC) algorithms that are resilient to the computational capability of quantum computers. Past works show malicious subversion with cryptographic software (algorithm subversion attacks) that weaken the implementations. We show that PQC digital signature codes can be subverted in line with previously reported flawed implementations [1], [2] that generate verifiable, but less-secure signatures, demonstrating the risk of such attacks. Since, all processors have built-in Hardware Performance Counters (HPCs), there exists a body of work proposing a lowcost Machine Learning (ML)-based integrity checking of software using HPC fingerprints. However, such HPC-based approaches may not detect subversion of PQC codes. A miniscule percentage of qualitative inputs when applied to the PQC codes improve this accuracy to 98%. We propose grey-box fuzzing as a preprocessing step to obtain inputs to aid the HPC-based method.

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Section: Code Subversion Detection Resultsmentioning

confidence: 99%

Fuzzing+Hardware Performance Counters-Based Detection of Algorithm Subversion Attacks on Post-Quantum Signature Schemes

Chowdhury,

Mahapatra,

Soni

et al. 2022

Preprint

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“…Side-channel attacks on cryptographic implementations vary in a wide range and several low-cost countermeasures have been proposed to mitigate them [47]- [52]. The first attack that comes to mind is the SPA attack [33].…”

Section: B Side-channel Attack Countermeasuresmentioning

confidence: 99%

Side-Channel Resistant 2048-Bit RSA Implementation for Wireless Sensor Networks and Internet of Things

Gulen

Baktır

2023

IEEE Access

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We present a practical realization of Rivest-Shamir-Adleman (RSA) with a 2048-bit key on MSP430, a widely used microcontroller in wireless sensor network and Internet of things applications, and show that 2048-bit RSA is feasible on a constrained microcontroller. We exploit several methods for acceleration, e.g. Montgomery modular multiplication, subtractive Karatsuba-Ofman and Chinese remainder theorem (CRT) based modular exponentiation, and achieve RSA encryption and decryption with a 2048-bit key on MSP430 in just 0.14 s and 7.56 s, respectively. Our implementation on the low-end MSP430 microcontroller achieves 2048-bit RSA significantly faster (×2.9 and ×2.4 for encryption and decryption) with respect to the existing implementation in the literature on the comparable ATmega128 microcontroller. While our implementation is secure against the brute force attack due to its 2048-bit key, and thus 112-bit security level, it also includes the necessary side-channel countermeasures, e. g. message and key blinding, to help mitigate implementation attacks such as simple power analysis and differential power analysis.

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“…Similarly, without API support, the expanded WOTS + seeds live plainly in transient memory. While in general hash-based signatures have a history of robustness against sidechannel attacks, it is precisely this usage of the PRF that has recently been under scrutiny [15].…”

Section: Side-channel Countermeasuresmentioning

confidence: 99%

Is Java Card Ready for Hash-Based Signatures?

Laan¹,

Poll²,

Rijneveld³

et al. 2018

Advances in Information and Computer Security

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Differential Power Analysis of XMSS and SPHINCS

Cited by 31 publications

References 25 publications

Fuzzing+Hardware Performance Counters-Based Detection of Algorithm Subversion Attacks on Post-Quantum Signature Schemes

Fuzzing+Hardware Performance Counters-Based Detection of Algorithm Subversion Attacks on Post-Quantum Signature Schemes

Side-Channel Resistant 2048-Bit RSA Implementation for Wireless Sensor Networks and Internet of Things

Is Java Card Ready for Hash-Based Signatures?

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