Digital background calibration algorithm and its FPGA implementation for timing mismatch correction of time-interleaved ADC

Abstract

Sample time error can degrade the performance of time-interleaved analog to digital converters (TIADCs). A fully digital background algorithm is presented in this paper to estimate and correct the timing mismatch errors between four interleaved channels, together with its hardware implementation. The proposed algorithm provides low computation burden and high performance. It is based on the simplified representation of the coefficients of the Lagrange interpolator. Simulation results show that it can suppress error tones in all of the Nyquist band. Results show that, for a four-channel TIADC with 10-bit resolution, the proposed algorithm improves the signal to noise and distortion ratio (SNDR) and spurious-free dynamic range (SFDR) by 19.27 dB and 35.2 dB, respectively. This analysis was done for an input signal frequency of 0:09f s. In the case of an input signal frequency of 0:45f s , an improvement by 33.06 dB and 43.14 dB is respectively achieved in SNDR and SFDR. In addition to the simulation, the algorithm was implemented in hardware for real-time evaluation. The low computational burden of the algorithm allowed an FPGA implementation with a low logic resource usage and a high system clock speed (926.95 MHz for four channel algorithm implementation). Thus, the proposed architecture can be used as a post-processing algorithm in host processors for data acquisition systems to improve the performance of TIADC.

A Digital Adaptive Calibration Method of Timing Mismatch in TIADC Based on Adjacent Channels Lagrange Mean Value Difference

“…2, where y i [n] represents the digital output of ADC i . The outputs of ADC i and ADC M/2+i are recombined into a new sequence denoted by y (i, M∕2+i) [0, 1, 2, … , 2n] = y i [0], y m∕2+i [0], y i [1], y M∕2+i [1], … , y i [n], y M∕2+i [n] . Similarly, the outputs of ADC i+1 and ADC M/2+i+1 are restructured as the sequence y (i+1, M∕2+i+1) [0, 1, 2, … , 2n] = y i+1 [0], y M∕2+i+1 [0], y i+1 [1], y M∕2+i+1 [1], … , y i+1 [n], y M∕2+i+1 [n] .…”

“…In order to improve the accuracy, the second-order Taylor series expansion structure is used in this design, which can be expressed as ( 17) where x�� [n] is the second derivative of the ideal output signal x[n] . To further reduce the delay, the result of the first-order correction x (1) [n] is used as the input of the second order to complete the subsequent correction, and ( 20) can be rewritten as Substituting (19) into (21), x�� [n] is replaced by y �� [n] , and ( 21) can be rewritten as The timing mismatch is corrected when Δt i converges near zero. Figure 6 illustrates the structure of the two-order differentiator-multiplier cascade, where H d [n] represents a differentiator and Z −D corresponds to the group delay of the differentiator.…”

“…However, the injected signal cannot be removed from the output by filtering, and it will affect the output. A calibration method based on the Lagrange interpolation polynomial is introduced in [1,28], where a finite impulse response (FIR) filter is used to correct the timing mismatch in the digital domain. The adaptive calibration of channel mismatch is achieved, based on the equivalent signal recombination [15].…”

Optimization Algorithms based compensation of mismatches in Time interleaved Analog to Digital Converters

“…A fully digital background algorithm was used to estimate and correct the timing mismatch errors between four interleaved channels [18]. The timing skew mismatches estimation methods for operating in the background, i.e., without interrupting the normal conversion, was reported [19].…”

Model for Choosing the Shape Parameter in the Multiquadratic Radial Basis Function Interpolation of an Arbitrary Sine Wave and Its Application

“…Therefore, correcting the clock delay mismatch is essential [7]. Two methods are used to calibrate TIADC system outputs [8][9][10][11]. The first method measures the error caused by the clock delay mismatch of the output points of each channel of the TIADC system through test signals, then uses this error to calibrate the output sampling points of the TIADC system.…”