Digital Low-Dropout Regulator Design Methodology for Performance Assessment in Early Stages of Integrated Circuit Design

Chen, Wei-Jen; Huang, Chung-Hsun

doi:10.1109/ifeec53238.2021.9661996

2021 IEEE International Future Energy Electronics Conference (IFEEC) 2021

DOI: 10.1109/ifeec53238.2021.9661996

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Digital Low-Dropout Regulator Design Methodology for Performance Assessment in Early Stages of Integrated Circuit Design

Wei-Jen Chen

Chung-Hsun Huang

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2024

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Model-Based Study on the Limit of the Dynamic Load Regulation Performance of a Digital Low Dropout Regulator

Xu,

Wang,

et al. 2024

IEEE Trans. VLSI Syst.

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Model-Based Study on the Limit of the Dynamic Load Regulation Performance of a Digital Low Dropout Regulator

Xu,

Wang,

et al. 2024

IEEE Trans. VLSI Syst.

View full text Add to dashboard Cite

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Digital Low-Dropout Regulator Design Methodology for Performance Assessment in Early Stages of Integrated Circuit Design

Cited by 1 publication

References 6 publications

Model-Based Study on the Limit of the Dynamic Load Regulation Performance of a Digital Low Dropout Regulator

Model-Based Study on the Limit of the Dynamic Load Regulation Performance of a Digital Low Dropout Regulator

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