Digital predistortion method combining memory polynomial and feed‐forward neural network

Abstract

A baseband digital predistortion (DPD) technique based on a feedforward neural network (FFNN) is presented. The process of memory polynomial (MP) DPD is time consuming because of the large number of mathematical calculations. The FFNN is adopted to realise the mathematical calculations in MP DPD with direct learning architecture (DLA). The training samples of the FFNN are derived from MP DPD with DLA. It guarantees the accuracy of imitating the MP DPD. Although the training of the FFNN is time consuming, the trained FFNN DPD is less time consuming than MP DPD. This solution is validated based on a power amplifier (PA) ZFL-2500 driven by a wideband code division multiple access (WCDMA) signal with 3.84 MHz bandwidth. The experimental results show that the FFNN can mimic the behaviour of the MP DPD. The proposed DPD achieves a significant improvement in linearity and is stable.Introduction: The power amplifier (PA) plays an important role in modern wireless communication systems. It is inherently nonlinear and is the main source of nonlinearity in the transmitter. To improve the quality of communication, and at the same time achieve high power efficiency, it is necessary to linearise the PA. Digital predistortion (DPD) is one of the most promising techniques for PA linearisation [1]. It pre-compensates for the nonlinearity of the PA by a block called predistorter (PD) having the PA's inverse characteristic. When the PD is cascaded with the PA, the whole system will have a linear behaviour. In modern wireless communication systems, DPD block becomes an essential component.Many DPD techniques have been reported in the literature. They can be classified into three categories: look-up table (LUT)-based DPDs [2, 3], polynomial-based DPDs [4-6] and neural network (NN)-based DPDs [7,8]. The LUT-based DPD is noted for its simplicity, but its linearisation performance depends on the size of the LUT. In [2], a dynamic slow envelope-dependent DPD is presented and implemented on field-programmable gate array (FPGA) using LUT. In [3], the quadratic-interpolated LUT is combined with the non-uniform memory polynomial (MP) model in DPD. The polynomial-based DPD has good linearisation performance but requires complex computations. An adaptive closed-loop DPD based on polynomial nonlinearity compensation is proposed in [4]. In [5], an MP DPD based on direct learning architecture is proposed. Another MP DPD is proposed in [6], which is based on indirect learning architecture. The MP model is widely used because it has lower complexity than the Volterra series model and can closely mimic the nonlinear behaviour of PA with memory effects. The artificial neural network (ANN) has excellent capability to accurately approximate nonlinear functions. Hence, ANN can be used to model the inverse characteristics of PA. In [7], a PD based on a multilayer perceptron is presented. In [8], a two-hidden-layer feedforward neural network (FFNN) model is proposed for PA modelling and DPD. In this Letter, a new DPD solution is proposed, where an FFNN is...

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