Digital RF processing system for Hardware-in-the-Loop simulation

Abstract

Hardware-in-the-Loop Technology and Simulation GroupAbstract-This paper presents the design of the Digital RF Processing (DRFP) system for generating many of the RF effects within the Advanced Radar Environment Simulator (ARES) Hardware-in-the-Loop system developed within the Hardwarein-the-Loop Technology and Simulation Group (HTS) of Weapons Systems Division (WSD), DSTO. This system is based on Digital RF Memory (DRFM) technology. The DRFM signal processing is performed on a digitised signal on a commercialoff-the-shelf (COTS) Field Programmable Gate Array (FPGA) hardware board. The RF Up/Down conversion is performed by a COTS RF module. The RF up/down converter translates an 800MHz instantaneous band in range 2-18 GHz down to 500 MHz IF signal (100 -900 MHz). The ARES Digital RF Processor (DRFP) provides the technique designer with a set of tools to model a number of environmental effects, such as Doppler, Range Delay, intra-pulse complex modulations, and multi-point convolutions. The ARES DRFP provides a real-time communication link to receive high fidelity generic environmental parameters which are computed by a numerical model of the radar environment. This feature provides the technique designer with significant flexibility compared to other typical Radar/RF scene generators. This paper discusses the implementation details and the design strategies of the development. Preliminary results of the ARES DRFP output are also discussed.

Multiprobe Radiation Simulation Method for Phased Array Radar Performance Evaluation

“…There are generally two infield test methods that target radar performance. One is the radio frequency (RF) injection method, in which the electromagnetic signals generated by the radar target simulator are fed into the RF receiver of the radar through the RF cable [10,11]. The other is the RF radiation method based on a triad array; it simulates the angular position of the target through the space vector synthesis of the three antennas [12,13].…”

Optimization of Power System Stabilizers Using Proportional-Integral-Derivative Controller-Based Antlion Algorithm: Experimental Validation via Electronics Environment

“…Most implemented case studies push the controller to its limits, which cannot be achieved in the natural operation of physical networks. HIL verification methodology evaluates and validates the effectiveness of the developed controllers by running a set of virtual scenarios in a complex system before real-world implementation [41,42]. HIL simulation blends digital simulation's speed with analog simulation's real-time nature [41].…”

“…HIL verification methodology evaluates and validates the effectiveness of the developed controllers by running a set of virtual scenarios in a complex system before real-world implementation [41,42]. HIL simulation blends digital simulation's speed with analog simulation's real-time nature [41]. It provides many benefits, including shorter development times, the ability to run multiple tests on practical systems, and experience realization without causing damage to equipment [43].…”