This paper deals with the automatic translation of interpreted generalized Petri Nets with time into VHDL, for rapid prototyping on programmable logic device purposes. This approach is based on the component orientation of the VHDL language, and defines two elementary VHDL components: the place and the transition. This transition component is a "pivot" element of the approach, since it supports all the interconnections between places and transitions (i.e. it allows the structure of the PN to be built). Moreover, with the aim to reduce power consumption, we proposed to control the VHDL component's activity according to an approach based on the "activity propagation" principle since PNs are oriented graphs.