Diode design for studying material defect distributions with avalanche–mode light emission

Krakers, Max; Knežević, Tihomir; Batenburg, Kevin M.; Liu, X.; Nanver, L.K.

doi:10.1109/icmts48187.2020.9107933

Cited by 3 publications

(5 citation statements)

References 13 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Examples of measurements are shown in Fig. 4 [16]. In addition, light emission from diodes under forward bias as well as reverse bias avalanching was used as a diagnostic tool to identify the location of other types of defects, which further confirmed the conclusions regarding nano-Schottky's at the perimeter.…”

Section: Nano-schottky's Related To Perimeter Defectssupporting

confidence: 57%

Identifying nano-Schottky diode currents in silicon diodes with 2D interfacial layers

Knežević¹,

Nanver

2023

2023 35th International Conference on Microelectronic Test Structure (ICMTS)

View full text Add to dashboard Cite

In silicon technology, Schottky diodes mainly exhibit high current levels, and attempts are regularly made to reduce these by introducing 2D layers between the metal contact and the silicon. Defects in such interfacial layers, from weakly bonded structures to actual pinholes, can lead to high, localized metal-semiconductor Schottky currents. Using the example of diodes with an interfacial layer of pure boron (PureB) between an aluminum metallization layer and the Si, a signature for such "nano-Schottky's" is determined by evaluating the results of several different test-structure arrays and measurement techniques. An adapted bipolar-type measurement is introduced as an additional method to determine whether any high current characteristics originate from a low Schottky barrier height over the entire diode surface or from a localized nano-Schottky structure.

show abstract

Section: Nano-schottky's Related To Perimeter Defectssupporting

confidence: 57%

Identifying nano-Schottky diode currents in silicon diodes with 2D interfacial layers

Knežević¹,

Nanver

2023

2023 35th International Conference on Microelectronic Test Structure (ICMTS)

View full text Add to dashboard Cite

show abstract

“…In view of the values of the anomalous currents, decades below that of even a few micrometer large Al-Si Schottky diodes, the size of the defects is expected to be less than a micrometer. Even for the SPAD6-N diodes with considerable perimeter leakage, device imaging, using methods such as atomic force microscopy (AFM) and scanning/transmission electron microscopy (SEM/TEM), did not reveal pitting of Si [24]. In the past, studies of B-layers as a material barrier to the Al-metallization did show several pits (inverted pyramids) per 100 μm 2 with cavity sizes mainly smaller than a micrometer if the B-layer was very thin, in that case only 1.8 nm as measured by TEM analysis [30].…”

Section: Discussionmentioning

confidence: 99%

“…7. The origin of this discrepancy was examined in [24], and it was found that the perimeter of the defected SPAD6-N devices was not sufficiently protected by the B-layer upon metallization although there were no signs of actual spiking of Al into Si. High leakage currents at RT were also frequently observed for PD6 devices, while the saturation currents of PD15 and PD30 devices were always the same as for the implanted p + n-junction diode.…”

Section: Al-induced Leakage In Small Pureb Diodesmentioning

confidence: 99%

“…Since the electrical behavior of PureB diodes relies on the interface properties rather than B-doping of the bulk Si and the B-layer itself is a few nanometers thin, any weak spots or pinholes in the B-layer are known to lead to undesirable current increase when metallized [17]. The diode perimeter was particularly susceptible to such unintended interactions with Al [24], a problem that could be avoided in large diodes by using implanted guard rings (GRs) at the perimeter.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Low-Temperature Electrical Performance of PureB Photodiodes Revealing Al-Metallization-Related Degradation of Dark Currents

Knežević

Suligoj

Capan

et al. 2021

IEEE Trans. Electron Devices

View full text Add to dashboard Cite

Pure boron (PureB) deposition as the anode region of Si photodiodes creates negative fixed charge at the boron/silicon interface, which is responsible for effective suppression of electron injection from the bulk, thus ensuring low saturation/dark current densities. This mechanism is shown here to remain effective when PureB diodes, fabricated at 700 • C, are operated at cryogenic temperatures down to 100 K. Although the PureB junctions were only a few nanometers deep, they displayed the same current-voltage (I-V) characteristics as conventional deep diffused p + −n junction diodes in the whole temperature range and also maintained ideality factors close to n = 1. Al-contacting was found to reveal process-related defects in the form of anomalous high current regions giving kinks in the I-V characteristics, often only visible at low temperatures. They were identified as minute Al-Si Schottky junctions with an effective barrier height of ∼0.65 ± 0.05 eV. In PureB single-photon avalanche diodes (SPADs), Al-Si perimeter defects appeared but did not affect the breakdown voltage characteristics set by implicit guard rings. Low series resistance required thin B-layers that promoted tunneling. In particular, for such thin layers, avoiding Al-related degradation puts stringent requirements on wafer cleaning and window etch procedures.

show abstract

“…In the 1950's it was discovered that silicon (Si) pnjunctions operating in avalanche breakdown exhibit broadspectrum electro-luminescence (EL) at short wave lengths (λ ∼ 350-900nm), although with a low internal quantum efficiency (η RAD ∼ 10 −5 ) [1], [2]. After this discovery it took practically half a century for research on Si avalanche-mode light emitting diodes (AMLEDs) to gain momentum ( [3]- [9]). This can be partly attributed to the advancement of commercial CMOS technology driven by the strong demand for more onchip functionality.…”

Section: Introductionmentioning

confidence: 99%

Electrical TCAD Study of the Low-Voltage Avalanche-Mode Superjunction LED

Hueting

Vries

Dutta

et al. 2021

IEEE Electron Device Lett.

View full text Add to dashboard Cite

The CMOS silicon avalanche-mode lightemitting diode (AMLED) has emerged as a potential light source for monolithic optical interconnects. Earlier we presented a superjunction light-emitting diode (SJLED) that offers a higher electroluminescent intensity compared to a conventional AMLED because of its more uniform field distribution. However, for reducing power consumption lowvoltage (≤15V) SJLEDs are desired, not explored before. In this work we present a TCAD simulation feasibility study of the low-voltage SJLED for various doping concentrations and device dimensions. The results show that for obtaining a constant field, approximately a tenfold more aggressive charge balance condition in the SJLED is estimated than traditionally reported. This is important for establishing a guideline to realize optimized RESURF and SJLEDs in the ever-shrinking advanced CMOS nodes.

show abstract

Diode design for studying material defect distributions with avalanche–mode light emission

Cited by 3 publications

References 13 publications

Identifying nano-Schottky diode currents in silicon diodes with 2D interfacial layers

Identifying nano-Schottky diode currents in silicon diodes with 2D interfacial layers

Low-Temperature Electrical Performance of PureB Photodiodes Revealing Al-Metallization-Related Degradation of Dark Currents

Electrical TCAD Study of the Low-Voltage Avalanche-Mode Superjunction LED

Contact Info

Product

Resources

About