Direct contact of high-k/Si gate stack for EOT below 0.7 nm using LaCe-silicate Layer with V<inf>fb</inf> controllability

Abstract

A direct high-k/Si gate stack has been proposed for gate oxide scaling. With LaCe-silicate, an EOT of 0.64 nm with an average dielectric constant (k av ) of 17.4 has been obtained and an extremely low gate leakage current (J g ) of 0.65 A/cm 2 . The flatband voltage (V fb ) can be controlled by the compositional ratio of La in the LaCe-silicate layer. Furthermore, incorporation of Ge atom into the silicate layer can effectively shift the V fb to positive direction. IntroductionThe scaling in gate dielectric below equivalent oxide thickness (EOT) of 0.7 nm essentially requires a technique to directly contact high-k dielectrics to Si substrate with good interfacial property [1]. Several techniques, including cycle deposition and annealing, or oxygen scavenging process, have been so far reported to achieve a direct contact of high-k/Si structure [2,3]. The high-k/Si interface with HfO 2 is sensitive to the oxygen partial pressure during the process, so that one must choose a process within a window to achieve a direct high-k/Si structure (Fig.1). On the other hand, La 2 O 3 can achieve a direct high-k/Si interface by forming a silicate layer with fairly nice interface properties [4]. However, the excess formation of silicate results in the increase in EOT. CeO 2 has an advantage in the wide process window to achieve a direct high-k/Si interface. In terms of gate leakage current (J g ), silicates have advantage in widening the band gap at the cost of EOT (Fig.2). Therefore, this work focuses on the combination of a Si-rich Ce-silicate with La 2 O 3 to achieve a direct high-k/Si interface with both reduction in J g and EOT.

Crystallization technique of epitaxial HfO<inf>2</inf> thin films on Si substrates and their potential for advanced high-k gate stack technology

“…6 where a trend of SiO 2 gate dielectric, studies of high-k films with SiO 2 interfacial layers reported between 2002 and 2004, and recent reports of direct bonding high-k films [11][12][13][14][15] are plotted in addition to our results of epitaxial HfO 2 MOSCAPs. Gate stack structures of high-k films with SiO 2 interfacial layers are effective to reduce the leakage current by 3 orders and more.…”

Nanoscale electrical and physical study of polycrystalline high-&#x03BA; dielectrics and proposed reliability enhancement techniques

“…Annealing the La 2 O 3 /CeO 2 stack transforms it into a LaCesilicate layer directly on Si without any nano-crystallization as shown in Fig. 5(a) [2]. The silicate layer formation occurs with the penetration of Si atoms from the substrate into the gate dielectric [13].…”

“…Considering the need to study the role of GBs which have a width of <1 nm [1], we employ scanning tunneling microscopy (STM) and transmission electron microscopy (TEM) as tools for nanometer resolution failure analysis, combining physical and electrical characterization. While Hf-based oxides are touted to be the most suitable candidate to replace SiO 2 /SiON, CeO 2 and La 2 O 3 /CeO 2 , are considered highly suitable candidates for direct deposition on Si substrate [2] (thereby eliminating the need for interfacial SiO x layer (IL) and enabling aggressive equivalent oxide thickness (EOT) scaling).…”

“…Lanthanum (La) incorporation into HK gate dielectrics has attracted much attention due to its beneficial effects, such as increased crystallization temperature, reduced leakage current and increased dielectric constant 'κ' value [2][3][4]. HK dielectric structures with two or multiple layers with different metal oxides have also been explored for the application of highperformance transistors [5].…”

Leakage current and structural analysis of annealed HfO2/La2O3 and CeO2/La2O3 dielectric stacks: A nanoscopic study

“…5,6 Capping layers can also be used to protect the HK and it has been reported that CeO 2 is the best capping layer for La 2 O 3 . 5,12 La incorporation into HK dielectrics has attracted much attention due to the beneficial effects of improved EOT and direct deposition. Further, La-incorporated HK shows additional improvements at the device level, such as increased crystallization temperature, reduced leakage current, and an increased dielectric constant "j" value.…”