Direct-current sputter epitaxy of Si and its application to fabricate n⁺-emitters for crystalline-Si solar cells

Abstract

Direct-current sputter epitaxy of Si on a Si(001) substrate was realized at 175 °C at a growth rate of 3.3 nm·s−1 and was applied to form n+-emitters of crystalline-Si solar cells. A solar cell with a 50-nm-thick n+-emitter exhibited a short current density of 23.8 mA·cm−2 owing to an increased internal quantum efficiency at wavelengths between 400 and 600 nm. The improved efficiency was due to the step junction characteristics of the epitaxially grown n+-emitter exhibiting a better response at short wavelengths, a performance better than that of the graded junction formed by thermal diffusion.

Sputter Epitaxial Growth of Flat Germanium Film with Low Threading-Dislocation Density on Silicon (001)

“…Owing to Ge's low absorption coefficient at near-infrared wavelength, however, light-absorbing layers with a total thickness of several micrometers are necessary, which require the Ge films to be grown on Si at high speed. So far, several growth techniques such as chemical vapor deposition (CVD), [4][5][6][7][8][9] vacuum evaporation (VE, including molecular beam epitaxy (MBE)), [10][11][12][13] and sputter epitaxy (SE) [14][15][16][17][18] have been applied to Ge epitaxy on Si. Among these techniques, SE takes advantage of surface bombardment by lowkinetic-energy particles, which enables epitaxy at low temperature, at high growth rate, and with high critical thickness.…”

“…By applying DC power for the sputtering process, 10-μm-thick Si have been grown on Si(001) at a rate of 3.3 nm • s −1 and under high-vacuum back pressure. 17,18 Furthermore, the potential of SE in SC fabrication has been demonstrated by the recent production of a single-crystalline-Si solar cell with an n + emitter, whose internal quantum efficiency is as high as 90%. 18 The main challenge of Ge epitaxy on a Si substrate is the 4.2% lattice mismatch, which can cause a cross-hatch pattern resulting from the Stranski-Krastanov (SK) growth mode.…”

Direct Current Sputter Epitaxy of Heavily Doped p+ Layer for Monocrystalline Si Solar Cells

“…The cathode power was kept at 100 W over this study. Details on sputter epitaxy can be further referred to in our previous studies [8,9]. p + n monocrystalline Si SCs were fabricated, together with n + p monocrystalline Si SCs for comparison.…”

“…Thus alternative method for formation of shallow and heavily doped n + and p + region under low thermal budget was demanded. To address this problem, we have proposed applying sputter epitaxy for n + emitter for SCs [8,9]. This is a low-temperature process-so forgoing dopants did not diffuse during subsequent opposite dopant type region formation-and also is a low-pressure process, so shadow-mask patterning with a minimum line and space width of ∼0.08 mm can be realized [10].…”

“…In our previous study, Sb was cosputtered with Si to grow n + -Si on Si substrate, and an abrupt dopant profile with a maximum Hall carrier concentration at 3 × 10 20 cm −3 was obtained [9]. Furthermore, n + emitter was grown on p-Si to form n + p SCs and had demonstrated that internal quantum efficiency (IQE) of the SCs around visible light can be as high as 95%, even higher than that in SCs with conventional thermal diffusion emitter [8]. Compared to n + -Si region, formation of p + -Si region is still a research challenge for p + emitter in emerging p + nn + Si SCs [11].…”