Distributed arithmetic multiplier based Artificial Neural Network architecture for image compression

Pinjare, S. L.; Mudnal, Kavita; Kumar, Sachin

doi:10.1109/pdgc.2012.6449805

Cited by 5 publications

(2 citation statements)

References 7 publications

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“…The SD representation has been used to reduce the time of execution of the multipliers used, for example, in an artificial neural network (ANN) inference phase as in [52], or to reduce the hardware complexity of multipliers used in an FPGA implementation of an ANN architecture as in [53], but also in many other efficient VLSI implementations [54][55][56][57].…”

Section: Amentioning

confidence: 99%

An Overview of Systolic Arrays for Forward and Inverse Discrete Sine Transforms and Their Exploitation in View of an Improved Approach

2022

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This paper aims to present a unified overview of the main Very Large-Scale Integration (VLSI) implementation solutions of forward and inverse discrete sine transforms using systolic arrays. The main features of the most important solutions to implement the forward and inverse discrete sine transform (DST) using systolic arrays are presented. One of the central ideas presented in the paper is to emphasize the advantages of using regular and modular systolic array computational structures such as cyclic convolution, circular correlation, and pseudo-band correlation in the VLSI implementation of these transforms. The use of such computational structures leads to architectures well adapted to the features of VLSI technologies, with an efficient use of the hardware structures and a reduced I/O cost that helps avoiding the so-called I/O bottleneck. With the techniques presented in this review, we have developed a new VLSI implementation of the DST using systolic arrays that allow efficient hardware implementation with reduced complexity while maintaining high-speed performances. Using a new restructuring input sequence, we have been able to efficiently reformulate the computation of the forward DST transform into a special computational structure using eight short quasi-cycle convolutions that can be computed with low complexity and where some of the coefficients are identical. This leads to a hardware structure with high throughput. The new restructuring sequence is the use of the input samples in a natural order as opposed to previous solutions, leading to a significant reduction of the hardware complexity in the pre-processing stage due to avoiding a permutation stage to reverse the order. Moreover, the proposed VLSI architecture allows an efficient incorporation of the obfuscation technique with very low overheads.

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Section: Amentioning

confidence: 99%

An Overview of Systolic Arrays for Forward and Inverse Discrete Sine Transforms and Their Exploitation in View of an Improved Approach

2022

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“…The basic idea of the DA is to replace all multiplications and additions by applying a look-up-table (LUT) and shifter accumulator. In addition, this technique relies on the fact that one of the input coefficients is constant [62]. Which important difference and a prerequisite for DA techniques.…”

Section: Hardware-based Implementation Of the Compression Systemsmentioning

confidence: 99%

Implementation Method on Medical Image Compression System: A Review

Muharam

Ahmad

2017

Jurnal Teknologi

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The rapid development of medical imaging and the invention of various medicines have benefited mankind and the whole community. Medical image processing is a niche area concerned with the operations and processes of generating images of the human body for clinical purposes. Potential areas such as image acquisition, image enhancement, image compression and storage, and image based visualization also include in medical image processing analysis. Unfortunately, medical image compression dealing with three-dimensional (3-D) modalities still in the pre-matured stage. Along with that, very limited researchers take a challenge to apply hardware on their implementation. Referring to the previous work reviewed, most of the compression method used lossless rather than lossy. For implementation using software, MATLAB and Verilog are the famous candidates among researchers. In term of analysis, most of the previous works conducted objective test compared with subjective test. This paper thoroughly reviews the recent advances in medical image compression mainly in terms of types of compression, software and hardware implementations and performance evaluation. Furthermore, challenges and open research issues are discussed in order to provide perspectives for future potential research. In conclusion, the overall picture of the image processing landscape, where several researchers more focused on software implementations and various combinations of software and hardware implementation.

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Handwritten Digit Detection and Prototyping on Field Programmable Gate Array (FPGA)

Madhavan,

Kumar,

Nisha

2023

2023 International Conference on Applied Intelligence and Sustainable Computing (ICAISC)

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Distributed arithmetic multiplier based Artificial Neural Network architecture for image compression

Cited by 5 publications

References 7 publications

An Overview of Systolic Arrays for Forward and Inverse Discrete Sine Transforms and Their Exploitation in View of an Improved Approach

An Overview of Systolic Arrays for Forward and Inverse Discrete Sine Transforms and Their Exploitation in View of an Improved Approach

Implementation Method on Medical Image Compression System: A Review

Handwritten Digit Detection and Prototyping on Field Programmable Gate Array (FPGA)

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