Distributed Class-J Power Amplifiers

Alizadeh, Amirreza; Medi, Ali

doi:10.1109/tmtt.2016.2615932

Cited by 35 publications

(20 citation statements)

References 18 publications

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“…Now, by substituting (18) in (20), one can obtain Z P3 (f L,U ) in terms of Z P1 (f L,U ; ie, the impedance seen from the package plane). On the other hand, by defining the impedance seen from the plane P3 (Z P3 ) at secondharmonic frequencies and knowing that the point B is short-circuited to the ground (at second-harmonics) we have…”

Section: Design Implementation and Measurementmentioning

confidence: 99%

Design of a high‐efficiency dual‐band class‐J/J power amplifier considering concurrent‐mode input drive

Shariatifar

Jalali

Abdipour

2019

Int J RF Microw Comput Aided Eng

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This article analyses concurrent dual-band Class-J/J power amplifiers (PAs) with simultaneous input drive at both bands. Although it is well known that the Class-J PA has the same performance regarding the efficiency compared with the conventional Class-B PA, in this article, we show that concurrent-mode efficiency of Class-J/J dual-band power amplifier is higher than the Class-B/B counterparts much closer to their single-mode efficiency. Furthermore, it has been explained that the performance of concurrent operation of dual-band PAs is highly dependent to the design space of PA load reactance at intermodulation terms. We also explore that at intermodulation frequencies the design space includes an efficiency degradation region occurring around a specific impedance, which should be avoided when designing for concurrent operation mode. The dependency of the concurrent-mode efficiency to the nonlinearity performance of the transistor output capacitance is also considered. A concurrent dual-band Class-J/J PA operating at 1.842 and 2.655 GHz bands is implemented, where the harmonic and intermodulation control networks are designed based on closed-form equations. Measured results reveal that about 60% balanced concurrent-mode efficiency can be achieved, which outperforms recently reported counterparts. At the lower and upper bands, output powers of 41 and 40.5 dBm and efficiencies of 73.5% and 71.7% are obtained, respectively. K E Y W O R D Sclass-J, concurrent dual-band power amplifier, high efficiency, intermodulation tuning

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Section: Design Implementation and Measurementmentioning

confidence: 99%

Design of a high‐efficiency dual‐band class‐J/J power amplifier considering concurrent‐mode input drive

Shariatifar

Jalali

Abdipour

2019

Int J RF Microw Comput Aided Eng

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“…A pHEMT DA with feedback active load demonstrates the 10.9 dB gain across 1-5 GHz [5]. A 0.25 μm GaAs pHEMT Class J DA produces the 10.5 dB gain, 30.7 dBm P out , and 44% PAE in the band of 1.5-10 GHz [6]. A 0.18 μm CMOS DA demonstrates 17.4 dB gain and 3.9 dBm P1 dB and 0.5-3.3% PAE in the 0.7-25.7 GHz band with P dc of 75.2 mW [7].…”

Section: Introductionmentioning

confidence: 99%

Design of a high‐gain silicon BJT and an E‐pHEMT hybrid matrix amplifier with an optimum filter‐matching technique

Sangaran¹,

Kumar²,

Paoloni

2019

IET Microwaves, Antennas & Propagation

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Software Defined Radio (SDR) is an advanced wireless transmission paradigm that permits to support all the consumer wireless protocols such as 2G, 3G, LTE, Wi-Fi (2.4 GHz and 5GHz), Bluetooth and Zigbee, by software rather than hardware. A typical frequency band of operation is in the range 0.5-6 GHz. The challenge to bring a SDR system on portable devices is the availability of Ultra-wide band compact amplifiers with high gain over a wide frequency band. A novel hybrid Silicon BJT and E-pHEMT matrix amplifier with two rows and four columns (2 by 4) of transistors is designed realized and tested demonstrating 0.65-5.8 GHz frequency band to satisfy the SDR specifications. The novel optimum filter matching technique is applied to optimize the performance and overcome the limit of the hybrid approach. The proposed matrix amplifier exhibits an average gain of 37.5dB and average output power of 18dBm across 0.65GHz-5.8GHz band with only 3V supply voltage. The gain is the highest in the state of the art for the frequency range. A bandwidth of 5.15 GHz, 20.3dBm one dB compression point at 1.35GHz, 10% to 16% power added efficiency and 1.2W DC power consumptions are obtained.

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“…Aptly then, PA designers are obsessed with power efficiency. Recent works on PA design can be found in [1][2][3][4][5][6][7][8].…”

Section: Introductionmentioning

confidence: 99%

On the Design of Class-J Microwave Power Amplifier

Abdulhamid

Karugu

Farhan

2019

The Scientific Bulletin of Electrical Engineering Faculty

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Due to the ISM band being unlicensed for communication applications, a lot of applications have been developed in this band and a good example is WiFi IEEE802.11a, b, g, n of Bluetooth. This numeracy of applications motivated this paper. The paper is concerned with the design of a low distortion 20dBm 2.4GHz class-J power amplifier (PA) since PAs are indispensable in radio communications. The design is based on the AVAGO ATF-52189 transistor with a transition frequency of 6GHz. The design is done as a hybrid circuit network realized using microstrip elements and surface mount device (SMD) capacitors. The schematic design, and simulation are carried out using Keysight’s Advanced Design System version 2016.01. The simulated PA exhibited a drain efficiency of 69% and a power output of21dBm.

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Distributed Class-J Power Amplifiers

Cited by 35 publications

References 18 publications

Design of a high‐efficiency dual‐band class‐J/J power amplifier considering concurrent‐mode input drive

Design of a high‐efficiency dual‐band class‐J/J power amplifier considering concurrent‐mode input drive

Design of a high‐gain silicon BJT and an E‐pHEMT hybrid matrix amplifier with an optimum filter‐matching technique

On the Design of Class-J Microwave Power Amplifier

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