DLTS Study on Al⁺ Ion Implanted and 1950°C Annealed p-i-n 4H-SiC Vertical Diodes

Abstract

A vertical 4H-SiC p-i-n diode with 2×1020cm-3 Al+ implanted emitter and 1950°C/5min post implantation annealing has been characterized by deep level transient spectroscopy (DLTS). Majority (electron) and minority (hole) carrier traps have been found. Electron traps with a homogeneous depth profile, are positioned at 0.16, 0.67 and 1.5 eV below the minimum edge of the conduction band, and have 3×10-15, 1.7×1014, and 1.8×10-14 cm2 capture cross section, respectively. A hole trap decreasing in intensity with decreasing pulse voltage occurs at 0.35 eV above the maximum edge of the valence band with 1×1013 cm2 apparent capture cross section. The highest density is observed for the refractory 0.67 eV electron trap that is due to the double negative acceptor states of the carbon vacancy.

Defects and electrical properties in Al-implanted 4H-SiC after activation annealing*

“…In the case of defect C, it is possible to demonstrate that it has a complex structure related to dislocations or carbon vacancy agglomerates. [19][20][21][22][23][24] The distribution of these defects is not uniform and appears to peak in a buried region close to the end of the Al-implanted region, which is between the bottom of implanted Al region and the unimplanted substrate. The defects of 1800 • C/15 min sample (Fig.…”

“…The formation of these dislocations may be related to a cluster of C-related defects, such as carbon vacancies. [19][20][21][22][23][24][25][26] To obtain the mechanisms responsible for the formation and elimination of extended defects, according to the previous defect theory, [15,[21][22][23] the defect model in Al-implanted 4H-SiC layer is also investigated. The high temperature activation annealing is the process of replacing the implanted Al atoms with Si.…”

“…Although redistribution of the implanted dopants and partial ion-induced damages can be reduced by high temperature implantation followed by high temperature annealing, not all the damages could be annealed out by higher temperature annealing, such as residual damages (distortion of lattice, vacancies and interstitials) and extended defects, because of dynamic defect recovery and generation in the activation annealing process. [13][14][15][16][17][18][19][20][21][22][23][24][25][26] And it was reported that the formation of extended defects in the implanted layers and the interfacial dislocations of the ion-implanted layer can occur in the annealing process. [15,20,23] Such high residual damages and extended defects of the implanted layers will greatly affect the electrical performance and reliability of SiC device, such as the mobility in MOSFETs and leakage current in PIN diodes.…”

“…[13][14][15][16][17][18][19][20][21][22][23][24][25][26] And it was reported that the formation of extended defects in the implanted layers and the interfacial dislocations of the ion-implanted layer can occur in the annealing process. [15,20,23] Such high residual damages and extended defects of the implanted layers will greatly affect the electrical performance and reliability of SiC device, such as the mobility in MOSFETs and leakage current in PIN diodes. How to suppress the generation and distribution of these defects is still an open issue in the study of this subject.…”

“…The micrograph indicates that most of the defects at the bottom of implanted Al layers created during annealing are dislocations as indicated by arrows in Fig.7(c). The formation of these dislocations may be related to a cluster of C-related defects, such as carbon vacancies [19][20][21][22][23][24][25][26].…”