Double dipole lithography for 65-nm node and beyond: a technology readiness review

Hsu, Stephen; Eurlings, Mark; Hendrickx, Eric; Broeke, Douglas J. Van Den; Chiou, Tsann-Bim; Chen, J. Fung; Laidig, Thomas L.; Shi, Xuelong; Finders, Jo

doi:10.1117/12.557797

Cited by 2 publications

(2 citation statements)

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“…It has been experimentally demonstrated that for ArF, the image log slope (ILS) is directly correlated to the line width roughness [18] [19]. For EUV, the local CD variation = stochastic dose variation  dose sensitivity (ILS -1 ), thus the higher the ILS, the lower the CD variation.…”

Section: Sepe and Illumination Efficiencymentioning

confidence: 99%

EUV resolution enhancement techniques (RETs) for k₁0.4 and below

Hsu¹,

Howell²,

Jia³

et al. 2015

SPIE Proceedings

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Due to the exponential growth of mobile wireless devices, low-power logic chips continue to drive device scaling. To enable sub-10 nm device scaling at an affordable cost, there is a strong need for single exposure advanced lithography. Extreme ultraviolet lithography (EUVL) is one of the most promising candidates to support the design rules for sub-10 nm. The aggressive mobile device design rules continue to push the critical dimension (CD) and pitch and put very stringent demands on the lithography performance such as pattern placement control, image contrast, critical dimension uniformity (CDU), and line width roughness (LWR).In this paper we report the latest advances in resolution enhancement techniques to address low k1 challenges in EUV lithography, specifically: minimizing the pattern placement error, enhancing the through-focus contrast, and reducing the impact of stochastic effects. We have developed an innovative source-mask optimization (SMO) method to significantly reduce edge placement errors (EPE) [1] [2]. Aggressive design rules using the state-of-the-art NA of 0.33 of the NXE:3300B and its successor tools can have imaging below k1 = 0.4, which can extend the current process capabilities for single exposure high volume manufacturing (HVM). Burkhardt et al. reported in a previous study that inserting a sub-resolution assist feature (SRAF) within semi-isolated features introduces strong Bossung tilts and best focus shifts, and a general solution for random pitches is not apparent [3]. Kang observed the same issues and proposed to introduce spherical aberrations to correct these effects while having a global impact on the full-chip [4]. In this work we introduce a new methodology to apply SRAFs to improve contrast, reduce best focus shift, and improve process window. Finally, the lower number of photons of EUV and the small feature size brings serious issue of the stochastic effect that causes the line-edge-roughness (LER) and local CD uniformity (LCDU). Source power, photoresist, mask bias, and feature size all impact the stochastic effects that can result in large LER for low-k1 patterning. We incorporate an empirical LER model in the SMO NXE frame work to study how the pupil, mask, dose, and target CD can be optimized to reduce stochastic edge placement errors (SEPE). We believe that these advanced EUV RET techniques can support imaging k1 below 0.4 and extend single exposure for an NA of 0.33, as is used in the NXE:3300B and its successor tools.

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Section: Sepe and Illumination Efficiencymentioning

confidence: 99%

EUV resolution enhancement techniques (RETs) for k₁0.4 and below

Hsu¹,

Howell²,

Jia³

et al. 2015

SPIE Proceedings

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“…The SGB can provide much lower reflectivity comparing to pure absorber. The physics of SGB had been discussed by Hsu et al 13 .…”

Section: Euv High-na Requires Interfield Stitchingmentioning

confidence: 99%

Computational lithography solutions to support EUV high-NA patterning

Zhao¹,

Zhang²,

Tang³

et al. 2023

DTCO and Computational Patterning II

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The EUV High-NA scanner brings innovative design changes to projection optics, such as introducing center obscuration and the anamorphic projection optical system in the projection optics box (POB) to improve the system transmission while the NA is improved1 . These design changes need to be accounted for in the computational lithography software solutions, to ensure accurate modeling and optimization of the High-NA system performance on wafer. In this paper, we will systematically investigate the benefits of Source Mask Optimization (SMO) and mask only optimization to explore EUV High-NA full chip patterning solutions, where mask 3D effects (M3D) are captured in the optical modeling. The paper will focus on assessing the performance (including process window, depth of focus, normalized image log slope) of through-pitch 1D Line/space (L/S) patterns and 2D Contact/Hole (CH) patterns after aforementioned optimizations and demonstrate the impact of center obscuration on imaging. In addition, we will investigate the effect of sub-resolution assistant feature (SRAF) on High-NA patterning via comparing the optimized lithographic performance with and without SRAF. These findings will help determine the most optimal patterning solutions for EUV High-NA as we move towards the first High NA EUV insertion. The paper will also discuss the anamorphic SMO where MRC and mask description needs to change from wafer plane (1x1) to scaled reticle plane (1x2). The interfield stitching will also be briefly discussed in this paper.

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Double dipole lithography for 65-nm node and beyond: a technology readiness review

Cited by 2 publications

References 0 publications

EUV resolution enhancement techniques (RETs) for k₁0.4 and below

EUV resolution enhancement techniques (RETs) for k₁0.4 and below

Computational lithography solutions to support EUV high-NA patterning

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Double dipole lithography for 65-nm node and beyond: a technology readiness review

Cited by 2 publications

References 0 publications

EUV resolution enhancement techniques (RETs) for k10.4 and below

EUV resolution enhancement techniques (RETs) for k10.4 and below

Computational lithography solutions to support EUV high-NA patterning

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Product

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EUV resolution enhancement techniques (RETs) for k₁0.4 and below

EUV resolution enhancement techniques (RETs) for k₁0.4 and below